1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Exynos low-level resume code 7 */ 8 9#include <linux/linkage.h> 10#include <asm/asm-offsets.h> 11#include <asm/hardware/cache-l2x0.h> 12#include "smc.h" 13 14#define CPU_MASK 0xff0ffff0 15#define CPU_CORTEX_A9 0x410fc090 16 17 .text 18 .align 19 20 /* 21 * sleep magic, to allow the bootloader to check for an valid 22 * image to resume to. Must be the first word before the 23 * exynos_cpu_resume entry. 24 */ 25 26 .word 0x2bedf00d 27 28 /* 29 * exynos_cpu_resume 30 * 31 * resume code entry for bootloader to call 32 */ 33 34ENTRY(exynos_cpu_resume) 35#ifdef CONFIG_CACHE_L2X0 36 mrc p15, 0, r0, c0, c0, 0 37 ldr r1, =CPU_MASK 38 and r0, r0, r1 39 ldr r1, =CPU_CORTEX_A9 40 cmp r0, r1 41 bleq l2c310_early_resume 42#endif 43 b cpu_resume 44ENDPROC(exynos_cpu_resume) 45 46 .align 47 48ENTRY(exynos_cpu_resume_ns) 49 mrc p15, 0, r0, c0, c0, 0 50 ldr r1, =CPU_MASK 51 and r0, r0, r1 52 ldr r1, =CPU_CORTEX_A9 53 cmp r0, r1 54 bne skip_cp15 55 56 adr r0, _cp15_save_power 57 ldr r1, [r0] 58 ldr r1, [r0, r1] 59 adr r0, _cp15_save_diag 60 ldr r2, [r0] 61 ldr r2, [r0, r2] 62 mov r0, #SMC_CMD_C15RESUME 63 dsb 64 smc #0 65#ifdef CONFIG_CACHE_L2X0 66 adr r0, 1f 67 ldr r2, [r0] 68 add r0, r2, r0 69 70 /* Check that the address has been initialised. */ 71 ldr r1, [r0, #L2X0_R_PHY_BASE] 72 teq r1, #0 73 beq skip_l2x0 74 75 /* Check if controller has been enabled. */ 76 ldr r2, [r1, #L2X0_CTRL] 77 tst r2, #0x1 78 bne skip_l2x0 79 80 ldr r1, [r0, #L2X0_R_TAG_LATENCY] 81 ldr r2, [r0, #L2X0_R_DATA_LATENCY] 82 ldr r3, [r0, #L2X0_R_PREFETCH_CTRL] 83 mov r0, #SMC_CMD_L2X0SETUP1 84 smc #0 85 86 /* Reload saved regs pointer because smc corrupts registers. */ 87 adr r0, 1f 88 ldr r2, [r0] 89 add r0, r2, r0 90 91 ldr r1, [r0, #L2X0_R_PWR_CTRL] 92 ldr r2, [r0, #L2X0_R_AUX_CTRL] 93 mov r0, #SMC_CMD_L2X0SETUP2 94 smc #0 95 96 mov r0, #SMC_CMD_L2X0INVALL 97 smc #0 98 99 mov r1, #1 100 mov r0, #SMC_CMD_L2X0CTRL 101 smc #0 102skip_l2x0: 103#endif /* CONFIG_CACHE_L2X0 */ 104skip_cp15: 105 b cpu_resume 106ENDPROC(exynos_cpu_resume_ns) 107 108 .align 109_cp15_save_power: 110 .long cp15_save_power - . 111_cp15_save_diag: 112 .long cp15_save_diag - . 113#ifdef CONFIG_CACHE_L2X0 1141: .long l2x0_saved_regs - . 115#endif /* CONFIG_CACHE_L2X0 */ 116 117 .data 118 .align 2 119 .globl cp15_save_diag 120cp15_save_diag: 121 .long 0 @ cp15 diagnostic 122 .globl cp15_save_power 123cp15_save_power: 124 .long 0 @ cp15 power control 125