xref: /linux/arch/arm/mach-exynos/exynos.c (revision b6ebbac51bedf9e98e837688bc838f400196da5e)
1 /*
2  * SAMSUNG EXYNOS Flattened Device Tree enabled machine
3  *
4  * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
5  *		http://www.samsung.com
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #include <linux/init.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/of_fdt.h>
17 #include <linux/platform_device.h>
18 #include <linux/irqchip.h>
19 #include <linux/soc/samsung/exynos-regs-pmu.h>
20 
21 #include <asm/cacheflush.h>
22 #include <asm/hardware/cache-l2x0.h>
23 #include <asm/mach/arch.h>
24 #include <asm/mach/map.h>
25 
26 #include <mach/map.h>
27 #include <plat/cpu.h>
28 
29 #include "common.h"
30 
31 static struct map_desc exynos4_iodesc[] __initdata = {
32 	{
33 		.virtual	= (unsigned long)S5P_VA_CMU,
34 		.pfn		= __phys_to_pfn(EXYNOS4_PA_CMU),
35 		.length		= SZ_128K,
36 		.type		= MT_DEVICE,
37 	}, {
38 		.virtual	= (unsigned long)S5P_VA_COREPERI_BASE,
39 		.pfn		= __phys_to_pfn(EXYNOS4_PA_COREPERI),
40 		.length		= SZ_8K,
41 		.type		= MT_DEVICE,
42 	}, {
43 		.virtual	= (unsigned long)S5P_VA_DMC0,
44 		.pfn		= __phys_to_pfn(EXYNOS4_PA_DMC0),
45 		.length		= SZ_64K,
46 		.type		= MT_DEVICE,
47 	}, {
48 		.virtual	= (unsigned long)S5P_VA_DMC1,
49 		.pfn		= __phys_to_pfn(EXYNOS4_PA_DMC1),
50 		.length		= SZ_64K,
51 		.type		= MT_DEVICE,
52 	},
53 };
54 
55 static struct platform_device exynos_cpuidle = {
56 	.name              = "exynos_cpuidle",
57 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
58 	.dev.platform_data = exynos_enter_aftr,
59 #endif
60 	.id                = -1,
61 };
62 
63 void __iomem *sysram_base_addr;
64 void __iomem *sysram_ns_base_addr;
65 
66 void __init exynos_sysram_init(void)
67 {
68 	struct device_node *node;
69 
70 	for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
71 		if (!of_device_is_available(node))
72 			continue;
73 		sysram_base_addr = of_iomap(node, 0);
74 		break;
75 	}
76 
77 	for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
78 		if (!of_device_is_available(node))
79 			continue;
80 		sysram_ns_base_addr = of_iomap(node, 0);
81 		break;
82 	}
83 }
84 
85 static void __init exynos_init_late(void)
86 {
87 	if (of_machine_is_compatible("samsung,exynos5440"))
88 		/* to be supported later */
89 		return;
90 
91 	exynos_pm_init();
92 }
93 
94 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
95 					int depth, void *data)
96 {
97 	struct map_desc iodesc;
98 	const __be32 *reg;
99 	int len;
100 
101 	if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
102 		!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
103 		return 0;
104 
105 	reg = of_get_flat_dt_prop(node, "reg", &len);
106 	if (reg == NULL || len != (sizeof(unsigned long) * 2))
107 		return 0;
108 
109 	iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
110 	iodesc.length = be32_to_cpu(reg[1]) - 1;
111 	iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
112 	iodesc.type = MT_DEVICE;
113 	iotable_init(&iodesc, 1);
114 	return 1;
115 }
116 
117 /*
118  * exynos_map_io
119  *
120  * register the standard cpu IO areas
121  */
122 static void __init exynos_map_io(void)
123 {
124 	if (soc_is_exynos4())
125 		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
126 }
127 
128 static void __init exynos_init_io(void)
129 {
130 	debug_ll_io_init();
131 
132 	of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
133 
134 	/* detect cpu id and rev. */
135 	s5p_init_cpu(S5P_VA_CHIPID);
136 
137 	exynos_map_io();
138 }
139 
140 /*
141  * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
142  * and suspend.
143  *
144  * This is necessary only on Exynos4 SoCs. When system is running
145  * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
146  * feature could properly detect global idle state when secondary CPU is
147  * powered down.
148  *
149  * However this should not be set when such system is going into suspend.
150  */
151 void exynos_set_delayed_reset_assertion(bool enable)
152 {
153 	if (of_machine_is_compatible("samsung,exynos4")) {
154 		unsigned int tmp, core_id;
155 
156 		for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
157 			tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
158 			if (enable)
159 				tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
160 			else
161 				tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
162 			pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
163 		}
164 	}
165 }
166 
167 /*
168  * Apparently, these SoCs are not able to wake-up from suspend using
169  * the PMU. Too bad. Should they suddenly become capable of such a
170  * feat, the matches below should be moved to suspend.c.
171  */
172 static const struct of_device_id exynos_dt_pmu_match[] = {
173 	{ .compatible = "samsung,exynos5260-pmu" },
174 	{ .compatible = "samsung,exynos5410-pmu" },
175 	{ /*sentinel*/ },
176 };
177 
178 static void exynos_map_pmu(void)
179 {
180 	struct device_node *np;
181 
182 	np = of_find_matching_node(NULL, exynos_dt_pmu_match);
183 	if (np)
184 		pmu_base_addr = of_iomap(np, 0);
185 }
186 
187 static void __init exynos_init_irq(void)
188 {
189 	irqchip_init();
190 	/*
191 	 * Since platsmp.c needs pmu base address by the time
192 	 * DT is not unflatten so we can't use DT APIs before
193 	 * init_irq
194 	 */
195 	exynos_map_pmu();
196 }
197 
198 static void __init exynos_dt_machine_init(void)
199 {
200 	/*
201 	 * This is called from smp_prepare_cpus if we've built for SMP, but
202 	 * we still need to set it up for PM and firmware ops if not.
203 	 */
204 	if (!IS_ENABLED(CONFIG_SMP))
205 		exynos_sysram_init();
206 
207 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
208 	if (of_machine_is_compatible("samsung,exynos4210") ||
209 	    of_machine_is_compatible("samsung,exynos3250"))
210 		exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
211 #endif
212 	if (of_machine_is_compatible("samsung,exynos4210") ||
213 	    of_machine_is_compatible("samsung,exynos4212") ||
214 	    (of_machine_is_compatible("samsung,exynos4412") &&
215 	     of_machine_is_compatible("samsung,trats2")) ||
216 	    of_machine_is_compatible("samsung,exynos3250") ||
217 	    of_machine_is_compatible("samsung,exynos5250"))
218 		platform_device_register(&exynos_cpuidle);
219 }
220 
221 static char const *const exynos_dt_compat[] __initconst = {
222 	"samsung,exynos3",
223 	"samsung,exynos3250",
224 	"samsung,exynos4",
225 	"samsung,exynos4210",
226 	"samsung,exynos4212",
227 	"samsung,exynos4412",
228 	"samsung,exynos4415",
229 	"samsung,exynos5",
230 	"samsung,exynos5250",
231 	"samsung,exynos5260",
232 	"samsung,exynos5420",
233 	"samsung,exynos5440",
234 	NULL
235 };
236 
237 static void __init exynos_dt_fixup(void)
238 {
239 	/*
240 	 * Some versions of uboot pass garbage entries in the memory node,
241 	 * use the old CONFIG_ARM_NR_BANKS
242 	 */
243 	of_fdt_limit_memory(8);
244 }
245 
246 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
247 	/* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
248 	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
249 	.l2c_aux_val	= 0x3c400001,
250 	.l2c_aux_mask	= 0xc20fffff,
251 	.smp		= smp_ops(exynos_smp_ops),
252 	.map_io		= exynos_init_io,
253 	.init_early	= exynos_firmware_init,
254 	.init_irq	= exynos_init_irq,
255 	.init_machine	= exynos_dt_machine_init,
256 	.init_late	= exynos_init_late,
257 	.dt_compat	= exynos_dt_compat,
258 	.dt_fixup	= exynos_dt_fixup,
259 MACHINE_END
260