xref: /linux/arch/arm/mach-exynos/common.h (revision ccd458c15df62e4e7001a09b1b000b1fce696640)
1cc511b8dSKukjin Kim /*
2cc511b8dSKukjin Kim  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3cc511b8dSKukjin Kim  *		http://www.samsung.com
4cc511b8dSKukjin Kim  *
5cc511b8dSKukjin Kim  * Common Header for EXYNOS machines
6cc511b8dSKukjin Kim  *
7cc511b8dSKukjin Kim  * This program is free software; you can redistribute it and/or modify
8cc511b8dSKukjin Kim  * it under the terms of the GNU General Public License version 2 as
9cc511b8dSKukjin Kim  * published by the Free Software Foundation.
10cc511b8dSKukjin Kim  */
11cc511b8dSKukjin Kim 
12cc511b8dSKukjin Kim #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
13cc511b8dSKukjin Kim #define __ARCH_ARM_MACH_EXYNOS_COMMON_H
14cc511b8dSKukjin Kim 
15906c789cSKukjin Kim extern struct sys_timer exynos4_timer;
16906c789cSKukjin Kim 
1706853ae4SMarc Zyngier struct map_desc;
18cc511b8dSKukjin Kim void exynos_init_io(struct map_desc *mach_desc, int size);
19cc511b8dSKukjin Kim void exynos4_init_irq(void);
2094c7ca71SKukjin Kim void exynos5_init_irq(void);
21906c789cSKukjin Kim void exynos4_restart(char mode, const char *cmd);
2294c7ca71SKukjin Kim void exynos5_restart(char mode, const char *cmd);
23bb13fabcSShawn Guo void exynos_init_late(void);
24bb13fabcSShawn Guo 
25bb13fabcSShawn Guo #ifdef CONFIG_PM_GENERIC_DOMAINS
26bb13fabcSShawn Guo int exynos_pm_late_initcall(void);
27bb13fabcSShawn Guo #else
28d0c2e4e4SOlof Johansson static inline int exynos_pm_late_initcall(void) { return 0; }
29bb13fabcSShawn Guo #endif
30cc511b8dSKukjin Kim 
31a855039eSKukjin Kim #ifdef CONFIG_ARCH_EXYNOS4
32cc511b8dSKukjin Kim void exynos4_register_clocks(void);
33cc511b8dSKukjin Kim void exynos4_setup_clocks(void);
34cc511b8dSKukjin Kim 
35a855039eSKukjin Kim #else
36a855039eSKukjin Kim #define exynos4_register_clocks()
37a855039eSKukjin Kim #define exynos4_setup_clocks()
38a855039eSKukjin Kim #endif
39a855039eSKukjin Kim 
4094c7ca71SKukjin Kim #ifdef CONFIG_ARCH_EXYNOS5
4194c7ca71SKukjin Kim void exynos5_register_clocks(void);
4294c7ca71SKukjin Kim void exynos5_setup_clocks(void);
4394c7ca71SKukjin Kim 
4494c7ca71SKukjin Kim #else
4594c7ca71SKukjin Kim #define exynos5_register_clocks()
4694c7ca71SKukjin Kim #define exynos5_setup_clocks()
4794c7ca71SKukjin Kim #endif
4894c7ca71SKukjin Kim 
49906c789cSKukjin Kim #ifdef CONFIG_CPU_EXYNOS4210
50906c789cSKukjin Kim void exynos4210_register_clocks(void);
51cc511b8dSKukjin Kim 
52cc511b8dSKukjin Kim #else
53906c789cSKukjin Kim #define exynos4210_register_clocks()
54906c789cSKukjin Kim #endif
55906c789cSKukjin Kim 
56906c789cSKukjin Kim #ifdef CONFIG_SOC_EXYNOS4212
57906c789cSKukjin Kim void exynos4212_register_clocks(void);
58906c789cSKukjin Kim 
59906c789cSKukjin Kim #else
60906c789cSKukjin Kim #define exynos4212_register_clocks()
61cc511b8dSKukjin Kim #endif
62cc511b8dSKukjin Kim 
6306853ae4SMarc Zyngier extern struct smp_operations exynos_smp_ops;
6406853ae4SMarc Zyngier 
6506853ae4SMarc Zyngier extern void exynos_cpu_die(unsigned int cpu);
6606853ae4SMarc Zyngier 
67*ccd458c1SKukjin Kim /* PMU(Power Management Unit) support */
68*ccd458c1SKukjin Kim 
69*ccd458c1SKukjin Kim #define PMU_TABLE_END	NULL
70*ccd458c1SKukjin Kim 
71*ccd458c1SKukjin Kim enum sys_powerdown {
72*ccd458c1SKukjin Kim 	SYS_AFTR,
73*ccd458c1SKukjin Kim 	SYS_LPA,
74*ccd458c1SKukjin Kim 	SYS_SLEEP,
75*ccd458c1SKukjin Kim 	NUM_SYS_POWERDOWN,
76*ccd458c1SKukjin Kim };
77*ccd458c1SKukjin Kim 
78*ccd458c1SKukjin Kim extern unsigned long l2x0_regs_phys;
79*ccd458c1SKukjin Kim struct exynos_pmu_conf {
80*ccd458c1SKukjin Kim 	void __iomem *reg;
81*ccd458c1SKukjin Kim 	unsigned int val[NUM_SYS_POWERDOWN];
82*ccd458c1SKukjin Kim };
83*ccd458c1SKukjin Kim 
84*ccd458c1SKukjin Kim extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
85*ccd458c1SKukjin Kim extern void s3c_cpu_resume(void);
86*ccd458c1SKukjin Kim 
87cc511b8dSKukjin Kim #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
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