1*1c37fa10SSebastian Hesselbarthconfig ARCH_BERLIN 2*1c37fa10SSebastian Hesselbarth bool "Marvell Berlin SoCs" if ARCH_MULTI_V7 3*1c37fa10SSebastian Hesselbarth select ARM_GIC 4*1c37fa10SSebastian Hesselbarth select GENERIC_CLOCKEVENTS 5*1c37fa10SSebastian Hesselbarth select GENERIC_IRQ_CHIP 6*1c37fa10SSebastian Hesselbarth select COMMON_CLK 7*1c37fa10SSebastian Hesselbarth select DW_APB_ICTL 8*1c37fa10SSebastian Hesselbarth select DW_APB_TIMER_OF 9*1c37fa10SSebastian Hesselbarth 10*1c37fa10SSebastian Hesselbarthif ARCH_BERLIN 11*1c37fa10SSebastian Hesselbarth 12*1c37fa10SSebastian Hesselbarthmenu "Marvell Berlin SoC variants" 13*1c37fa10SSebastian Hesselbarth 14*1c37fa10SSebastian Hesselbarthconfig MACH_BERLIN_BG2 15*1c37fa10SSebastian Hesselbarth bool "Marvell Armada 1500 (BG2)" 16*1c37fa10SSebastian Hesselbarth select CACHE_L2X0 17*1c37fa10SSebastian Hesselbarth select CPU_PJ4B 18*1c37fa10SSebastian Hesselbarth select HAVE_ARM_TWD if SMP 19*1c37fa10SSebastian Hesselbarth select HAVE_SMP 20*1c37fa10SSebastian Hesselbarth 21*1c37fa10SSebastian Hesselbarthconfig MACH_BERLIN_BG2CD 22*1c37fa10SSebastian Hesselbarth bool "Marvell Armada 1500-mini (BG2CD)" 23*1c37fa10SSebastian Hesselbarth select CACHE_L2X0 24*1c37fa10SSebastian Hesselbarth select CPU_V7 25*1c37fa10SSebastian Hesselbarth select HAVE_ARM_TWD if SMP 26*1c37fa10SSebastian Hesselbarth 27*1c37fa10SSebastian Hesselbarthendmenu 28*1c37fa10SSebastian Hesselbarth 29*1c37fa10SSebastian Hesselbarthendif 30