1 /* 2 * arch/arm/mach-at91/pm.c 3 * AT91 Power Management 4 * 5 * Copyright (C) 2005 David Brownell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13 #include <linux/gpio.h> 14 #include <linux/suspend.h> 15 #include <linux/sched.h> 16 #include <linux/proc_fs.h> 17 #include <linux/interrupt.h> 18 #include <linux/sysfs.h> 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 #include <linux/io.h> 22 #include <linux/clk/at91_pmc.h> 23 24 #include <asm/irq.h> 25 #include <linux/atomic.h> 26 #include <asm/mach/time.h> 27 #include <asm/mach/irq.h> 28 29 #include <mach/cpu.h> 30 #include <mach/hardware.h> 31 32 #include "generic.h" 33 #include "pm.h" 34 35 static void (*at91_pm_standby)(void); 36 37 static int at91_pm_valid_state(suspend_state_t state) 38 { 39 switch (state) { 40 case PM_SUSPEND_ON: 41 case PM_SUSPEND_STANDBY: 42 case PM_SUSPEND_MEM: 43 return 1; 44 45 default: 46 return 0; 47 } 48 } 49 50 51 static suspend_state_t target_state; 52 53 /* 54 * Called after processes are frozen, but before we shutdown devices. 55 */ 56 static int at91_pm_begin(suspend_state_t state) 57 { 58 target_state = state; 59 return 0; 60 } 61 62 /* 63 * Verify that all the clocks are correct before entering 64 * slow-clock mode. 65 */ 66 static int at91_pm_verify_clocks(void) 67 { 68 unsigned long scsr; 69 int i; 70 71 scsr = at91_pmc_read(AT91_PMC_SCSR); 72 73 /* USB must not be using PLLB */ 74 if (cpu_is_at91rm9200()) { 75 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { 76 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 77 return 0; 78 } 79 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() 80 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { 81 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { 82 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 83 return 0; 84 } 85 } 86 87 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 88 for (i = 0; i < 4; i++) { 89 u32 css; 90 91 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 92 continue; 93 94 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 95 if (css != AT91_PMC_CSS_SLOW) { 96 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 97 return 0; 98 } 99 } 100 101 return 1; 102 } 103 104 /* 105 * Call this from platform driver suspend() to see how deeply to suspend. 106 * For example, some controllers (like OHCI) need one of the PLL clocks 107 * in order to act as a wakeup source, and those are not available when 108 * going into slow clock mode. 109 * 110 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have 111 * the very same problem (but not using at91 main_clk), and it'd be better 112 * to add one generic API rather than lots of platform-specific ones. 113 */ 114 int at91_suspend_entering_slow_clock(void) 115 { 116 return (target_state == PM_SUSPEND_MEM); 117 } 118 EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 119 120 121 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, 122 void __iomem *ramc1, int memctrl); 123 124 #ifdef CONFIG_AT91_SLOW_CLOCK 125 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, 126 void __iomem *ramc1, int memctrl); 127 extern u32 at91_slow_clock_sz; 128 #endif 129 130 static int at91_pm_enter(suspend_state_t state) 131 { 132 at91_pinctrl_gpio_suspend(); 133 134 switch (state) { 135 /* 136 * Suspend-to-RAM is like STANDBY plus slow clock mode, so 137 * drivers must suspend more deeply: only the master clock 138 * controller may be using the main oscillator. 139 */ 140 case PM_SUSPEND_MEM: 141 /* 142 * Ensure that clocks are in a valid state. 143 */ 144 if (!at91_pm_verify_clocks()) 145 goto error; 146 147 /* 148 * Enter slow clock mode by switching over to clk32k and 149 * turning off the main oscillator; reverse on wakeup. 150 */ 151 if (slow_clock) { 152 int memctrl = AT91_MEMCTRL_SDRAMC; 153 154 if (cpu_is_at91rm9200()) 155 memctrl = AT91_MEMCTRL_MC; 156 else if (cpu_is_at91sam9g45()) 157 memctrl = AT91_MEMCTRL_DDRSDR; 158 #ifdef CONFIG_AT91_SLOW_CLOCK 159 /* copy slow_clock handler to SRAM, and call it */ 160 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); 161 #endif 162 slow_clock(at91_pmc_base, at91_ramc_base[0], 163 at91_ramc_base[1], memctrl); 164 break; 165 } else { 166 pr_info("AT91: PM - no slow clock mode enabled ...\n"); 167 /* FALLTHROUGH leaving master clock alone */ 168 } 169 170 /* 171 * STANDBY mode has *all* drivers suspended; ignores irqs not 172 * marked as 'wakeup' event sources; and reduces DRAM power. 173 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and 174 * nothing fancy done with main or cpu clocks. 175 */ 176 case PM_SUSPEND_STANDBY: 177 /* 178 * NOTE: the Wait-for-Interrupt instruction needs to be 179 * in icache so no SDRAM accesses are needed until the 180 * wakeup IRQ occurs and self-refresh is terminated. 181 * For ARM 926 based chips, this requirement is weaker 182 * as at91sam9 can access a RAM in self-refresh mode. 183 */ 184 if (at91_pm_standby) 185 at91_pm_standby(); 186 break; 187 188 case PM_SUSPEND_ON: 189 cpu_do_idle(); 190 break; 191 192 default: 193 pr_debug("AT91: PM - bogus suspend state %d\n", state); 194 goto error; 195 } 196 197 error: 198 target_state = PM_SUSPEND_ON; 199 200 at91_pinctrl_gpio_resume(); 201 return 0; 202 } 203 204 /* 205 * Called right prior to thawing processes. 206 */ 207 static void at91_pm_end(void) 208 { 209 target_state = PM_SUSPEND_ON; 210 } 211 212 213 static const struct platform_suspend_ops at91_pm_ops = { 214 .valid = at91_pm_valid_state, 215 .begin = at91_pm_begin, 216 .enter = at91_pm_enter, 217 .end = at91_pm_end, 218 }; 219 220 static struct platform_device at91_cpuidle_device = { 221 .name = "cpuidle-at91", 222 }; 223 224 void at91_pm_set_standby(void (*at91_standby)(void)) 225 { 226 if (at91_standby) { 227 at91_cpuidle_device.dev.platform_data = at91_standby; 228 at91_pm_standby = at91_standby; 229 } 230 } 231 232 static int __init at91_pm_init(void) 233 { 234 #ifdef CONFIG_AT91_SLOW_CLOCK 235 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); 236 #endif 237 238 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); 239 240 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ 241 if (cpu_is_at91rm9200()) 242 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); 243 244 if (at91_cpuidle_device.dev.platform_data) 245 platform_device_register(&at91_cpuidle_device); 246 247 suspend_set_ops(&at91_pm_ops); 248 249 return 0; 250 } 251 arch_initcall(at91_pm_init); 252