xref: /linux/arch/arm/mach-at91/at91sam9.c (revision c0e297dc61f8d4453e07afbea1fa8d0e67cd4a34)
1 /*
2  *  Setup code for AT91SAM9
3  *
4  *  Copyright (C) 2011 Atmel,
5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
6  *
7  * Licensed under GPLv2 or later.
8  */
9 
10 #include <linux/of.h>
11 #include <linux/of_platform.h>
12 
13 #include <asm/mach/arch.h>
14 #include <asm/system_misc.h>
15 
16 #include "generic.h"
17 #include "soc.h"
18 
19 static const struct at91_soc at91sam9_socs[] = {
20 	AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
21 	AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
22 	AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
23 	AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
24 	AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
25 	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
26 		 "at91sam9m11", "at91sam9g45"),
27 	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
28 		 "at91sam9m10", "at91sam9g45"),
29 	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
30 		 "at91sam9g46", "at91sam9g45"),
31 	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
32 		 "at91sam9g45", "at91sam9g45"),
33 	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
34 		 "at91sam9g15", "at91sam9x5"),
35 	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
36 		 "at91sam9g35", "at91sam9x5"),
37 	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
38 		 "at91sam9x35", "at91sam9x5"),
39 	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
40 		 "at91sam9g25", "at91sam9x5"),
41 	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
42 		 "at91sam9x25", "at91sam9x5"),
43 	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
44 		 "at91sam9cn12", "at91sam9n12"),
45 	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
46 		 "at91sam9n12", "at91sam9n12"),
47 	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
48 		 "at91sam9cn11", "at91sam9n12"),
49 	AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
50 	AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
51 	AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
52 	{ /* sentinel */ },
53 };
54 
55 static void __init at91sam9_common_init(void)
56 {
57 	struct soc_device *soc;
58 	struct device *soc_dev = NULL;
59 
60 	soc = at91_soc_init(at91sam9_socs);
61 	if (soc != NULL)
62 		soc_dev = soc_device_to_device(soc);
63 
64 	of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
65 
66 	arm_pm_idle = at91sam9_idle;
67 }
68 
69 static void __init at91sam9_dt_device_init(void)
70 {
71 	at91sam9_common_init();
72 	at91sam9260_pm_init();
73 }
74 
75 static const char *at91_dt_board_compat[] __initconst = {
76 	"atmel,at91sam9",
77 	NULL
78 };
79 
80 DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
81 	/* Maintainer: Atmel */
82 	.init_machine	= at91sam9_dt_device_init,
83 	.dt_compat	= at91_dt_board_compat,
84 MACHINE_END
85 
86 static void __init at91sam9g45_dt_device_init(void)
87 {
88 	at91sam9_common_init();
89 	at91sam9g45_pm_init();
90 }
91 
92 static const char *at91sam9g45_board_compat[] __initconst = {
93 	"atmel,at91sam9g45",
94 	NULL
95 };
96 
97 DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
98 	/* Maintainer: Atmel */
99 	.init_machine	= at91sam9g45_dt_device_init,
100 	.dt_compat	= at91sam9g45_board_compat,
101 MACHINE_END
102 
103 static void __init at91sam9x5_dt_device_init(void)
104 {
105 	at91sam9_common_init();
106 	at91sam9x5_pm_init();
107 }
108 
109 static const char *at91sam9x5_board_compat[] __initconst = {
110 	"atmel,at91sam9x5",
111 	"atmel,at91sam9n12",
112 	NULL
113 };
114 
115 DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
116 	/* Maintainer: Atmel */
117 	.init_machine	= at91sam9x5_dt_device_init,
118 	.dt_compat	= at91sam9x5_board_compat,
119 MACHINE_END
120