1*d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 2d0a533b1SWill Deacon/* 3d0a533b1SWill Deacon * linux/arch/arm/lib/delay.S 4d0a533b1SWill Deacon * 5d0a533b1SWill Deacon * Copyright (C) 1995, 1996 Russell King 6d0a533b1SWill Deacon */ 7d0a533b1SWill Deacon#include <linux/linkage.h> 8d0a533b1SWill Deacon#include <asm/assembler.h> 9d0a533b1SWill Deacon#include <asm/delay.h> 10215e362dSNicolas Pitre 11d0a533b1SWill Deacon .text 12d0a533b1SWill Deacon 13d0a533b1SWill Deacon.LC0: .word loops_per_jiffy 14d0a533b1SWill Deacon.LC1: .word UDELAY_MULT 15d0a533b1SWill Deacon 16d0a533b1SWill Deacon/* 17207b1150SNicolas Pitre * loops = r0 * HZ * loops_per_jiffy / 1000000 18207b1150SNicolas Pitre * 19d0a533b1SWill Deacon * r0 <= 2000 20d0a533b1SWill Deacon * HZ <= 1000 21d0a533b1SWill Deacon */ 22d0a533b1SWill Deacon 23d0a533b1SWill DeaconENTRY(__loop_udelay) 24d0a533b1SWill Deacon ldr r2, .LC1 25207b1150SNicolas Pitre mul r0, r2, r0 @ r0 = delay_us * UDELAY_MULT 26207b1150SNicolas PitreENTRY(__loop_const_udelay) @ 0 <= r0 <= 0xfffffaf0 27d0a533b1SWill Deacon ldr r2, .LC0 28215e362dSNicolas Pitre ldr r2, [r2] 29207b1150SNicolas Pitre umull r1, r0, r2, r0 @ r0-r1 = r0 * loops_per_jiffy 30207b1150SNicolas Pitre adds r1, r1, #0xffffffff @ rounding up ... 31207b1150SNicolas Pitre adcs r0, r0, r0 @ and right shift by 31 326ebbf2ceSRussell King reteq lr 33d0a533b1SWill Deacon 3411d4bb1bSFabio Estevam .align 3 35d0a533b1SWill Deacon 36d0a533b1SWill Deacon@ Delay routine 37d0a533b1SWill DeaconENTRY(__loop_delay) 38d0a533b1SWill Deacon subs r0, r0, #1 39d0a533b1SWill Deacon#if 0 406ebbf2ceSRussell King retls lr 41d0a533b1SWill Deacon subs r0, r0, #1 426ebbf2ceSRussell King retls lr 43d0a533b1SWill Deacon subs r0, r0, #1 446ebbf2ceSRussell King retls lr 45d0a533b1SWill Deacon subs r0, r0, #1 466ebbf2ceSRussell King retls lr 47d0a533b1SWill Deacon subs r0, r0, #1 486ebbf2ceSRussell King retls lr 49d0a533b1SWill Deacon subs r0, r0, #1 506ebbf2ceSRussell King retls lr 51d0a533b1SWill Deacon subs r0, r0, #1 526ebbf2ceSRussell King retls lr 53d0a533b1SWill Deacon subs r0, r0, #1 54d0a533b1SWill Deacon#endif 55d0a533b1SWill Deacon bhi __loop_delay 566ebbf2ceSRussell King ret lr 57d0a533b1SWill DeaconENDPROC(__loop_udelay) 58d0a533b1SWill DeaconENDPROC(__loop_const_udelay) 59d0a533b1SWill DeaconENDPROC(__loop_delay) 60