1 .macro bitop, instr 2 and r2, r0, #7 3 mov r3, #1 4 mov r3, r3, lsl r2 5 save_and_disable_irqs ip, r2 6 ldrb r2, [r1, r0, lsr #3] 7 \instr r2, r2, r3 8 strb r2, [r1, r0, lsr #3] 9 restore_irqs ip 10 mov pc, lr 11 .endm 12 13 /** 14 * testop - implement a test_and_xxx_bit operation. 15 * @instr: operational instruction 16 * @store: store instruction 17 * 18 * Note: we can trivially conditionalise the store instruction 19 * to avoid dirting the data cache. 20 */ 21 .macro testop, instr, store 22 add r1, r1, r0, lsr #3 23 and r3, r0, #7 24 mov r0, #1 25 save_and_disable_irqs ip, r2 26 ldrb r2, [r1] 27 tst r2, r0, lsl r3 28 \instr r2, r2, r0, lsl r3 29 \store r2, [r1] 30 restore_irqs ip 31 moveq r0, #0 32 mov pc, lr 33 .endm 34