1 /* 2 * linux/arch/arm/kernel/swp_emulate.c 3 * 4 * Copyright (C) 2009 ARM Limited 5 * __user_* functions adapted from include/asm/uaccess.h 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Implements emulation of the SWP/SWPB instructions using load-exclusive and 12 * store-exclusive for processors that have them disabled (or future ones that 13 * might not implement them). 14 * 15 * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>] 16 * Where: Rt = destination 17 * Rt2 = source 18 * Rn = address 19 */ 20 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/proc_fs.h> 24 #include <linux/seq_file.h> 25 #include <linux/sched.h> 26 #include <linux/syscalls.h> 27 #include <linux/perf_event.h> 28 29 #include <asm/opcodes.h> 30 #include <asm/system_info.h> 31 #include <asm/traps.h> 32 #include <asm/uaccess.h> 33 34 /* 35 * Error-checking SWP macros implemented using ldrex{b}/strex{b} 36 */ 37 #define __user_swpX_asm(data, addr, res, temp, B) \ 38 __asm__ __volatile__( \ 39 " mov %2, %1\n" \ 40 "0: ldrex"B" %1, [%3]\n" \ 41 "1: strex"B" %0, %2, [%3]\n" \ 42 " cmp %0, #0\n" \ 43 " movne %0, %4\n" \ 44 "2:\n" \ 45 " .section .fixup,\"ax\"\n" \ 46 " .align 2\n" \ 47 "3: mov %0, %5\n" \ 48 " b 2b\n" \ 49 " .previous\n" \ 50 " .section __ex_table,\"a\"\n" \ 51 " .align 3\n" \ 52 " .long 0b, 3b\n" \ 53 " .long 1b, 3b\n" \ 54 " .previous" \ 55 : "=&r" (res), "+r" (data), "=&r" (temp) \ 56 : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ 57 : "cc", "memory") 58 59 #define __user_swp_asm(data, addr, res, temp) \ 60 __user_swpX_asm(data, addr, res, temp, "") 61 #define __user_swpb_asm(data, addr, res, temp) \ 62 __user_swpX_asm(data, addr, res, temp, "b") 63 64 /* 65 * Macros/defines for extracting register numbers from instruction. 66 */ 67 #define EXTRACT_REG_NUM(instruction, offset) \ 68 (((instruction) & (0xf << (offset))) >> (offset)) 69 #define RN_OFFSET 16 70 #define RT_OFFSET 12 71 #define RT2_OFFSET 0 72 /* 73 * Bit 22 of the instruction encoding distinguishes between 74 * the SWP and SWPB variants (bit set means SWPB). 75 */ 76 #define TYPE_SWPB (1 << 22) 77 78 static unsigned long swpcounter; 79 static unsigned long swpbcounter; 80 static unsigned long abtcounter; 81 static pid_t previous_pid; 82 83 #ifdef CONFIG_PROC_FS 84 static int proc_status_show(struct seq_file *m, void *v) 85 { 86 seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter); 87 seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter); 88 seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter); 89 if (previous_pid != 0) 90 seq_printf(m, "Last process:\t\t%d\n", previous_pid); 91 return 0; 92 } 93 94 static int proc_status_open(struct inode *inode, struct file *file) 95 { 96 return single_open(file, proc_status_show, PDE_DATA(inode)); 97 } 98 99 static const struct file_operations proc_status_fops = { 100 .open = proc_status_open, 101 .read = seq_read, 102 .llseek = seq_lseek, 103 .release = single_release, 104 }; 105 #endif 106 107 /* 108 * Set up process info to signal segmentation fault - called on access error. 109 */ 110 static void set_segfault(struct pt_regs *regs, unsigned long addr) 111 { 112 siginfo_t info; 113 114 down_read(¤t->mm->mmap_sem); 115 if (find_vma(current->mm, addr) == NULL) 116 info.si_code = SEGV_MAPERR; 117 else 118 info.si_code = SEGV_ACCERR; 119 up_read(¤t->mm->mmap_sem); 120 121 info.si_signo = SIGSEGV; 122 info.si_errno = 0; 123 info.si_addr = (void *) instruction_pointer(regs); 124 125 pr_debug("SWP{B} emulation: access caused memory abort!\n"); 126 arm_notify_die("Illegal memory access", regs, &info, 0, 0); 127 128 abtcounter++; 129 } 130 131 static int emulate_swpX(unsigned int address, unsigned int *data, 132 unsigned int type) 133 { 134 unsigned int res = 0; 135 136 if ((type != TYPE_SWPB) && (address & 0x3)) { 137 /* SWP to unaligned address not permitted */ 138 pr_debug("SWP instruction on unaligned pointer!\n"); 139 return -EFAULT; 140 } 141 142 while (1) { 143 unsigned long temp; 144 145 if (type == TYPE_SWPB) 146 __user_swpb_asm(*data, address, res, temp); 147 else 148 __user_swp_asm(*data, address, res, temp); 149 150 if (likely(res != -EAGAIN) || signal_pending(current)) 151 break; 152 153 cond_resched(); 154 } 155 156 if (res == 0) { 157 if (type == TYPE_SWPB) 158 swpbcounter++; 159 else 160 swpcounter++; 161 } 162 163 return res; 164 } 165 166 /* 167 * swp_handler logs the id of calling process, dissects the instruction, sanity 168 * checks the memory location, calls emulate_swpX for the actual operation and 169 * deals with fixup/error handling before returning 170 */ 171 static int swp_handler(struct pt_regs *regs, unsigned int instr) 172 { 173 unsigned int address, destreg, data, type; 174 unsigned int res = 0; 175 176 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); 177 178 res = arm_check_condition(instr, regs->ARM_cpsr); 179 switch (res) { 180 case ARM_OPCODE_CONDTEST_PASS: 181 break; 182 case ARM_OPCODE_CONDTEST_FAIL: 183 /* Condition failed - return to next instruction */ 184 regs->ARM_pc += 4; 185 return 0; 186 case ARM_OPCODE_CONDTEST_UNCOND: 187 /* If unconditional encoding - not a SWP, undef */ 188 return -EFAULT; 189 default: 190 return -EINVAL; 191 } 192 193 if (current->pid != previous_pid) { 194 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", 195 current->comm, (unsigned long)current->pid); 196 previous_pid = current->pid; 197 } 198 199 address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)]; 200 data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)]; 201 destreg = EXTRACT_REG_NUM(instr, RT_OFFSET); 202 203 type = instr & TYPE_SWPB; 204 205 pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n", 206 EXTRACT_REG_NUM(instr, RN_OFFSET), address, 207 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data); 208 209 /* Check access in reasonable access range for both SWP and SWPB */ 210 if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) { 211 pr_debug("SWP{B} emulation: access to %p not allowed!\n", 212 (void *)address); 213 res = -EFAULT; 214 } else { 215 res = emulate_swpX(address, &data, type); 216 } 217 218 if (res == 0) { 219 /* 220 * On successful emulation, revert the adjustment to the PC 221 * made in kernel/traps.c in order to resume execution at the 222 * instruction following the SWP{B}. 223 */ 224 regs->ARM_pc += 4; 225 regs->uregs[destreg] = data; 226 } else if (res == -EFAULT) { 227 /* 228 * Memory errors do not mean emulation failed. 229 * Set up signal info to return SEGV, then return OK 230 */ 231 set_segfault(regs, address); 232 } 233 234 return 0; 235 } 236 237 /* 238 * Only emulate SWP/SWPB executed in ARM state/User mode. 239 * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE. 240 */ 241 static struct undef_hook swp_hook = { 242 .instr_mask = 0x0fb00ff0, 243 .instr_val = 0x01000090, 244 .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT, 245 .cpsr_val = USR_MODE, 246 .fn = swp_handler 247 }; 248 249 /* 250 * Register handler and create status file in /proc/cpu 251 * Invoked as late_initcall, since not needed before init spawned. 252 */ 253 static int __init swp_emulation_init(void) 254 { 255 if (cpu_architecture() < CPU_ARCH_ARMv7) 256 return 0; 257 258 #ifdef CONFIG_PROC_FS 259 if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops)) 260 return -ENOMEM; 261 #endif /* CONFIG_PROC_FS */ 262 263 printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n"); 264 register_undef_hook(&swp_hook); 265 266 return 0; 267 } 268 269 late_initcall(swp_emulation_init); 270