xref: /linux/arch/arm/kernel/suspend.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 #include <linux/init.h>
2 #include <linux/slab.h>
3 #include <linux/mm_types.h>
4 
5 #include <asm/cacheflush.h>
6 #include <asm/idmap.h>
7 #include <asm/pgalloc.h>
8 #include <asm/pgtable.h>
9 #include <asm/memory.h>
10 #include <asm/smp_plat.h>
11 #include <asm/suspend.h>
12 #include <asm/tlbflush.h>
13 
14 extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
15 extern void cpu_resume_mmu(void);
16 
17 #ifdef CONFIG_MMU
18 int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
19 {
20 	struct mm_struct *mm = current->active_mm;
21 	u32 __mpidr = cpu_logical_map(smp_processor_id());
22 	int ret;
23 
24 	if (!idmap_pgd)
25 		return -EINVAL;
26 
27 	/*
28 	 * Provide a temporary page table with an identity mapping for
29 	 * the MMU-enable code, required for resuming.  On successful
30 	 * resume (indicated by a zero return code), we need to switch
31 	 * back to the correct page tables.
32 	 */
33 	ret = __cpu_suspend(arg, fn, __mpidr);
34 	if (ret == 0) {
35 		cpu_switch_mm(mm->pgd, mm);
36 		local_flush_bp_all();
37 		local_flush_tlb_all();
38 	}
39 
40 	return ret;
41 }
42 #else
43 int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
44 {
45 	u32 __mpidr = cpu_logical_map(smp_processor_id());
46 	return __cpu_suspend(arg, fn, __mpidr);
47 }
48 #define	idmap_pgd	NULL
49 #endif
50 
51 /*
52  * This is called by __cpu_suspend() to save the state, and do whatever
53  * flushing is required to ensure that when the CPU goes to sleep we have
54  * the necessary data available when the caches are not searched.
55  */
56 void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
57 {
58 	u32 *ctx = ptr;
59 
60 	*save_ptr = virt_to_phys(ptr);
61 
62 	/* This must correspond to the LDM in cpu_resume() assembly */
63 	*ptr++ = virt_to_phys(idmap_pgd);
64 	*ptr++ = sp;
65 	*ptr++ = virt_to_phys(cpu_do_resume);
66 
67 	cpu_do_suspend(ptr);
68 
69 	flush_cache_louis();
70 
71 	/*
72 	 * flush_cache_louis does not guarantee that
73 	 * save_ptr and ptr are cleaned to main memory,
74 	 * just up to the Level of Unification Inner Shareable.
75 	 * Since the context pointer and context itself
76 	 * are to be retrieved with the MMU off that
77 	 * data must be cleaned from all cache levels
78 	 * to main memory using "area" cache primitives.
79 	*/
80 	__cpuc_flush_dcache_area(ctx, ptrsz);
81 	__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
82 
83 	outer_clean_range(*save_ptr, *save_ptr + ptrsz);
84 	outer_clean_range(virt_to_phys(save_ptr),
85 			  virt_to_phys(save_ptr) + sizeof(*save_ptr));
86 }
87 
88 extern struct sleep_save_sp sleep_save_sp;
89 
90 static int cpu_suspend_alloc_sp(void)
91 {
92 	void *ctx_ptr;
93 	/* ctx_ptr is an array of physical addresses */
94 	ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
95 
96 	if (WARN_ON(!ctx_ptr))
97 		return -ENOMEM;
98 	sleep_save_sp.save_ptr_stash = ctx_ptr;
99 	sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
100 	sync_cache_w(&sleep_save_sp);
101 	return 0;
102 }
103 early_initcall(cpu_suspend_alloc_sp);
104