1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/arm/kernel/smp.c 4 * 5 * Copyright (C) 2002 ARM Limited, All Rights Reserved. 6 */ 7 #include <linux/module.h> 8 #include <linux/delay.h> 9 #include <linux/init.h> 10 #include <linux/spinlock.h> 11 #include <linux/sched/mm.h> 12 #include <linux/sched/hotplug.h> 13 #include <linux/sched/task_stack.h> 14 #include <linux/interrupt.h> 15 #include <linux/cache.h> 16 #include <linux/profile.h> 17 #include <linux/errno.h> 18 #include <linux/mm.h> 19 #include <linux/err.h> 20 #include <linux/cpu.h> 21 #include <linux/seq_file.h> 22 #include <linux/irq.h> 23 #include <linux/nmi.h> 24 #include <linux/percpu.h> 25 #include <linux/clockchips.h> 26 #include <linux/completion.h> 27 #include <linux/cpufreq.h> 28 #include <linux/irq_work.h> 29 #include <linux/kernel_stat.h> 30 31 #include <linux/atomic.h> 32 #include <asm/bugs.h> 33 #include <asm/smp.h> 34 #include <asm/cacheflush.h> 35 #include <asm/cpu.h> 36 #include <asm/cputype.h> 37 #include <asm/exception.h> 38 #include <asm/idmap.h> 39 #include <asm/topology.h> 40 #include <asm/mmu_context.h> 41 #include <asm/procinfo.h> 42 #include <asm/processor.h> 43 #include <asm/sections.h> 44 #include <asm/tlbflush.h> 45 #include <asm/ptrace.h> 46 #include <asm/smp_plat.h> 47 #include <asm/virt.h> 48 #include <asm/mach/arch.h> 49 #include <asm/mpu.h> 50 51 #define CREATE_TRACE_POINTS 52 #include <trace/events/ipi.h> 53 54 /* 55 * as from 2.5, kernels no longer have an init_tasks structure 56 * so we need some other way of telling a new secondary core 57 * where to place its SVC stack 58 */ 59 struct secondary_data secondary_data; 60 61 enum ipi_msg_type { 62 IPI_WAKEUP, 63 IPI_TIMER, 64 IPI_RESCHEDULE, 65 IPI_CALL_FUNC, 66 IPI_CPU_STOP, 67 IPI_IRQ_WORK, 68 IPI_COMPLETION, 69 NR_IPI, 70 /* 71 * CPU_BACKTRACE is special and not included in NR_IPI 72 * or tracable with trace_ipi_* 73 */ 74 IPI_CPU_BACKTRACE = NR_IPI, 75 /* 76 * SGI8-15 can be reserved by secure firmware, and thus may 77 * not be usable by the kernel. Please keep the above limited 78 * to at most 8 entries. 79 */ 80 MAX_IPI 81 }; 82 83 static int ipi_irq_base __read_mostly; 84 static int nr_ipi __read_mostly = NR_IPI; 85 static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly; 86 87 static void ipi_setup(int cpu); 88 89 static DECLARE_COMPLETION(cpu_running); 90 91 static struct smp_operations smp_ops __ro_after_init; 92 93 void __init smp_set_ops(const struct smp_operations *ops) 94 { 95 if (ops) 96 smp_ops = *ops; 97 }; 98 99 static unsigned long get_arch_pgd(pgd_t *pgd) 100 { 101 #ifdef CONFIG_ARM_LPAE 102 return __phys_to_pfn(virt_to_phys(pgd)); 103 #else 104 return virt_to_phys(pgd); 105 #endif 106 } 107 108 #if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR) 109 static int secondary_biglittle_prepare(unsigned int cpu) 110 { 111 if (!cpu_vtable[cpu]) 112 cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL); 113 114 return cpu_vtable[cpu] ? 0 : -ENOMEM; 115 } 116 117 static void secondary_biglittle_init(void) 118 { 119 init_proc_vtable(lookup_processor(read_cpuid_id())->proc); 120 } 121 #else 122 static int secondary_biglittle_prepare(unsigned int cpu) 123 { 124 return 0; 125 } 126 127 static void secondary_biglittle_init(void) 128 { 129 } 130 #endif 131 132 int __cpu_up(unsigned int cpu, struct task_struct *idle) 133 { 134 int ret; 135 136 if (!smp_ops.smp_boot_secondary) 137 return -ENOSYS; 138 139 ret = secondary_biglittle_prepare(cpu); 140 if (ret) 141 return ret; 142 143 /* 144 * We need to tell the secondary core where to find 145 * its stack and the page tables. 146 */ 147 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; 148 #ifdef CONFIG_ARM_MPU 149 secondary_data.mpu_rgn_info = &mpu_rgn_info; 150 #endif 151 152 #ifdef CONFIG_MMU 153 secondary_data.pgdir = virt_to_phys(idmap_pgd); 154 secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir); 155 #endif 156 sync_cache_w(&secondary_data); 157 158 /* 159 * Now bring the CPU into our world. 160 */ 161 ret = smp_ops.smp_boot_secondary(cpu, idle); 162 if (ret == 0) { 163 /* 164 * CPU was successfully started, wait for it 165 * to come online or time out. 166 */ 167 wait_for_completion_timeout(&cpu_running, 168 msecs_to_jiffies(1000)); 169 170 if (!cpu_online(cpu)) { 171 pr_crit("CPU%u: failed to come online\n", cpu); 172 ret = -EIO; 173 } 174 } else { 175 pr_err("CPU%u: failed to boot: %d\n", cpu, ret); 176 } 177 178 179 memset(&secondary_data, 0, sizeof(secondary_data)); 180 return ret; 181 } 182 183 /* platform specific SMP operations */ 184 void __init smp_init_cpus(void) 185 { 186 if (smp_ops.smp_init_cpus) 187 smp_ops.smp_init_cpus(); 188 } 189 190 int platform_can_secondary_boot(void) 191 { 192 return !!smp_ops.smp_boot_secondary; 193 } 194 195 int platform_can_cpu_hotplug(void) 196 { 197 #ifdef CONFIG_HOTPLUG_CPU 198 if (smp_ops.cpu_kill) 199 return 1; 200 #endif 201 202 return 0; 203 } 204 205 #ifdef CONFIG_HOTPLUG_CPU 206 static int platform_cpu_kill(unsigned int cpu) 207 { 208 if (smp_ops.cpu_kill) 209 return smp_ops.cpu_kill(cpu); 210 return 1; 211 } 212 213 static int platform_cpu_disable(unsigned int cpu) 214 { 215 if (smp_ops.cpu_disable) 216 return smp_ops.cpu_disable(cpu); 217 218 return 0; 219 } 220 221 int platform_can_hotplug_cpu(unsigned int cpu) 222 { 223 /* cpu_die must be specified to support hotplug */ 224 if (!smp_ops.cpu_die) 225 return 0; 226 227 if (smp_ops.cpu_can_disable) 228 return smp_ops.cpu_can_disable(cpu); 229 230 /* 231 * By default, allow disabling all CPUs except the first one, 232 * since this is special on a lot of platforms, e.g. because 233 * of clock tick interrupts. 234 */ 235 return cpu != 0; 236 } 237 238 static void ipi_teardown(int cpu) 239 { 240 int i; 241 242 if (WARN_ON_ONCE(!ipi_irq_base)) 243 return; 244 245 for (i = 0; i < nr_ipi; i++) 246 disable_percpu_irq(ipi_irq_base + i); 247 } 248 249 /* 250 * __cpu_disable runs on the processor to be shutdown. 251 */ 252 int __cpu_disable(void) 253 { 254 unsigned int cpu = smp_processor_id(); 255 int ret; 256 257 ret = platform_cpu_disable(cpu); 258 if (ret) 259 return ret; 260 261 #ifdef CONFIG_GENERIC_ARCH_TOPOLOGY 262 remove_cpu_topology(cpu); 263 #endif 264 265 /* 266 * Take this CPU offline. Once we clear this, we can't return, 267 * and we must not schedule until we're ready to give up the cpu. 268 */ 269 set_cpu_online(cpu, false); 270 ipi_teardown(cpu); 271 272 /* 273 * OK - migrate IRQs away from this CPU 274 */ 275 irq_migrate_all_off_this_cpu(); 276 277 /* 278 * Flush user cache and TLB mappings, and then remove this CPU 279 * from the vm mask set of all processes. 280 * 281 * Caches are flushed to the Level of Unification Inner Shareable 282 * to write-back dirty lines to unified caches shared by all CPUs. 283 */ 284 flush_cache_louis(); 285 local_flush_tlb_all(); 286 287 return 0; 288 } 289 290 /* 291 * called on the thread which is asking for a CPU to be shutdown - 292 * waits until shutdown has completed, or it is timed out. 293 */ 294 void __cpu_die(unsigned int cpu) 295 { 296 if (!cpu_wait_death(cpu, 5)) { 297 pr_err("CPU%u: cpu didn't die\n", cpu); 298 return; 299 } 300 pr_debug("CPU%u: shutdown\n", cpu); 301 302 clear_tasks_mm_cpumask(cpu); 303 /* 304 * platform_cpu_kill() is generally expected to do the powering off 305 * and/or cutting of clocks to the dying CPU. Optionally, this may 306 * be done by the CPU which is dying in preference to supporting 307 * this call, but that means there is _no_ synchronisation between 308 * the requesting CPU and the dying CPU actually losing power. 309 */ 310 if (!platform_cpu_kill(cpu)) 311 pr_err("CPU%u: unable to kill\n", cpu); 312 } 313 314 /* 315 * Called from the idle thread for the CPU which has been shutdown. 316 * 317 * Note that we disable IRQs here, but do not re-enable them 318 * before returning to the caller. This is also the behaviour 319 * of the other hotplug-cpu capable cores, so presumably coming 320 * out of idle fixes this. 321 */ 322 void arch_cpu_idle_dead(void) 323 { 324 unsigned int cpu = smp_processor_id(); 325 326 idle_task_exit(); 327 328 local_irq_disable(); 329 330 /* 331 * Flush the data out of the L1 cache for this CPU. This must be 332 * before the completion to ensure that data is safely written out 333 * before platform_cpu_kill() gets called - which may disable 334 * *this* CPU and power down its cache. 335 */ 336 flush_cache_louis(); 337 338 /* 339 * Tell __cpu_die() that this CPU is now safe to dispose of. Once 340 * this returns, power and/or clocks can be removed at any point 341 * from this CPU and its cache by platform_cpu_kill(). 342 */ 343 (void)cpu_report_death(); 344 345 /* 346 * Ensure that the cache lines associated with that completion are 347 * written out. This covers the case where _this_ CPU is doing the 348 * powering down, to ensure that the completion is visible to the 349 * CPU waiting for this one. 350 */ 351 flush_cache_louis(); 352 353 /* 354 * The actual CPU shutdown procedure is at least platform (if not 355 * CPU) specific. This may remove power, or it may simply spin. 356 * 357 * Platforms are generally expected *NOT* to return from this call, 358 * although there are some which do because they have no way to 359 * power down the CPU. These platforms are the _only_ reason we 360 * have a return path which uses the fragment of assembly below. 361 * 362 * The return path should not be used for platforms which can 363 * power off the CPU. 364 */ 365 if (smp_ops.cpu_die) 366 smp_ops.cpu_die(cpu); 367 368 pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n", 369 cpu); 370 371 /* 372 * Do not return to the idle loop - jump back to the secondary 373 * cpu initialisation. There's some initialisation which needs 374 * to be repeated to undo the effects of taking the CPU offline. 375 */ 376 __asm__("mov sp, %0\n" 377 " mov fp, #0\n" 378 " b secondary_start_kernel" 379 : 380 : "r" (task_stack_page(current) + THREAD_SIZE - 8)); 381 } 382 #endif /* CONFIG_HOTPLUG_CPU */ 383 384 /* 385 * Called by both boot and secondaries to move global data into 386 * per-processor storage. 387 */ 388 static void smp_store_cpu_info(unsigned int cpuid) 389 { 390 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); 391 392 cpu_info->loops_per_jiffy = loops_per_jiffy; 393 cpu_info->cpuid = read_cpuid_id(); 394 395 store_cpu_topology(cpuid); 396 check_cpu_icache_size(cpuid); 397 } 398 399 /* 400 * This is the secondary CPU boot entry. We're using this CPUs 401 * idle thread stack, but a set of temporary page tables. 402 */ 403 asmlinkage void secondary_start_kernel(void) 404 { 405 struct mm_struct *mm = &init_mm; 406 unsigned int cpu; 407 408 secondary_biglittle_init(); 409 410 /* 411 * The identity mapping is uncached (strongly ordered), so 412 * switch away from it before attempting any exclusive accesses. 413 */ 414 cpu_switch_mm(mm->pgd, mm); 415 local_flush_bp_all(); 416 enter_lazy_tlb(mm, current); 417 local_flush_tlb_all(); 418 419 /* 420 * All kernel threads share the same mm context; grab a 421 * reference and switch to it. 422 */ 423 cpu = smp_processor_id(); 424 mmgrab(mm); 425 current->active_mm = mm; 426 cpumask_set_cpu(cpu, mm_cpumask(mm)); 427 428 cpu_init(); 429 430 #ifndef CONFIG_MMU 431 setup_vectors_base(); 432 #endif 433 pr_debug("CPU%u: Booted secondary processor\n", cpu); 434 435 preempt_disable(); 436 trace_hardirqs_off(); 437 438 /* 439 * Give the platform a chance to do its own initialisation. 440 */ 441 if (smp_ops.smp_secondary_init) 442 smp_ops.smp_secondary_init(cpu); 443 444 notify_cpu_starting(cpu); 445 446 ipi_setup(cpu); 447 448 calibrate_delay(); 449 450 smp_store_cpu_info(cpu); 451 452 /* 453 * OK, now it's safe to let the boot CPU continue. Wait for 454 * the CPU migration code to notice that the CPU is online 455 * before we continue - which happens after __cpu_up returns. 456 */ 457 set_cpu_online(cpu, true); 458 459 check_other_bugs(); 460 461 complete(&cpu_running); 462 463 local_irq_enable(); 464 local_fiq_enable(); 465 local_abt_enable(); 466 467 /* 468 * OK, it's off to the idle thread for us 469 */ 470 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 471 } 472 473 void __init smp_cpus_done(unsigned int max_cpus) 474 { 475 int cpu; 476 unsigned long bogosum = 0; 477 478 for_each_online_cpu(cpu) 479 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; 480 481 printk(KERN_INFO "SMP: Total of %d processors activated " 482 "(%lu.%02lu BogoMIPS).\n", 483 num_online_cpus(), 484 bogosum / (500000/HZ), 485 (bogosum / (5000/HZ)) % 100); 486 487 hyp_mode_check(); 488 } 489 490 void __init smp_prepare_boot_cpu(void) 491 { 492 set_my_cpu_offset(per_cpu_offset(smp_processor_id())); 493 } 494 495 void __init smp_prepare_cpus(unsigned int max_cpus) 496 { 497 unsigned int ncores = num_possible_cpus(); 498 499 init_cpu_topology(); 500 501 smp_store_cpu_info(smp_processor_id()); 502 503 /* 504 * are we trying to boot more cores than exist? 505 */ 506 if (max_cpus > ncores) 507 max_cpus = ncores; 508 if (ncores > 1 && max_cpus) { 509 /* 510 * Initialise the present map, which describes the set of CPUs 511 * actually populated at the present time. A platform should 512 * re-initialize the map in the platforms smp_prepare_cpus() 513 * if present != possible (e.g. physical hotplug). 514 */ 515 init_cpu_present(cpu_possible_mask); 516 517 /* 518 * Initialise the SCU if there are more than one CPU 519 * and let them know where to start. 520 */ 521 if (smp_ops.smp_prepare_cpus) 522 smp_ops.smp_prepare_cpus(max_cpus); 523 } 524 } 525 526 static const char *ipi_types[NR_IPI] __tracepoint_string = { 527 [IPI_WAKEUP] = "CPU wakeup interrupts", 528 [IPI_TIMER] = "Timer broadcast interrupts", 529 [IPI_RESCHEDULE] = "Rescheduling interrupts", 530 [IPI_CALL_FUNC] = "Function call interrupts", 531 [IPI_CPU_STOP] = "CPU stop interrupts", 532 [IPI_IRQ_WORK] = "IRQ work interrupts", 533 [IPI_COMPLETION] = "completion interrupts", 534 }; 535 536 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr); 537 538 void show_ipi_list(struct seq_file *p, int prec) 539 { 540 unsigned int cpu, i; 541 542 for (i = 0; i < NR_IPI; i++) { 543 if (!ipi_desc[i]) 544 continue; 545 546 seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); 547 548 for_each_online_cpu(cpu) 549 seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu)); 550 551 seq_printf(p, " %s\n", ipi_types[i]); 552 } 553 } 554 555 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 556 { 557 smp_cross_call(mask, IPI_CALL_FUNC); 558 } 559 560 void arch_send_wakeup_ipi_mask(const struct cpumask *mask) 561 { 562 smp_cross_call(mask, IPI_WAKEUP); 563 } 564 565 void arch_send_call_function_single_ipi(int cpu) 566 { 567 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC); 568 } 569 570 #ifdef CONFIG_IRQ_WORK 571 void arch_irq_work_raise(void) 572 { 573 if (arch_irq_work_has_interrupt()) 574 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK); 575 } 576 #endif 577 578 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST 579 void tick_broadcast(const struct cpumask *mask) 580 { 581 smp_cross_call(mask, IPI_TIMER); 582 } 583 #endif 584 585 static DEFINE_RAW_SPINLOCK(stop_lock); 586 587 /* 588 * ipi_cpu_stop - handle IPI from smp_send_stop() 589 */ 590 static void ipi_cpu_stop(unsigned int cpu) 591 { 592 if (system_state <= SYSTEM_RUNNING) { 593 raw_spin_lock(&stop_lock); 594 pr_crit("CPU%u: stopping\n", cpu); 595 dump_stack(); 596 raw_spin_unlock(&stop_lock); 597 } 598 599 set_cpu_online(cpu, false); 600 601 local_fiq_disable(); 602 local_irq_disable(); 603 604 while (1) { 605 cpu_relax(); 606 wfe(); 607 } 608 } 609 610 static DEFINE_PER_CPU(struct completion *, cpu_completion); 611 612 int register_ipi_completion(struct completion *completion, int cpu) 613 { 614 per_cpu(cpu_completion, cpu) = completion; 615 return IPI_COMPLETION; 616 } 617 618 static void ipi_complete(unsigned int cpu) 619 { 620 complete(per_cpu(cpu_completion, cpu)); 621 } 622 623 /* 624 * Main handler for inter-processor interrupts 625 */ 626 asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) 627 { 628 handle_IPI(ipinr, regs); 629 } 630 631 static void do_handle_IPI(int ipinr) 632 { 633 unsigned int cpu = smp_processor_id(); 634 635 if ((unsigned)ipinr < NR_IPI) 636 trace_ipi_entry_rcuidle(ipi_types[ipinr]); 637 638 switch (ipinr) { 639 case IPI_WAKEUP: 640 break; 641 642 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST 643 case IPI_TIMER: 644 tick_receive_broadcast(); 645 break; 646 #endif 647 648 case IPI_RESCHEDULE: 649 scheduler_ipi(); 650 break; 651 652 case IPI_CALL_FUNC: 653 generic_smp_call_function_interrupt(); 654 break; 655 656 case IPI_CPU_STOP: 657 ipi_cpu_stop(cpu); 658 break; 659 660 #ifdef CONFIG_IRQ_WORK 661 case IPI_IRQ_WORK: 662 irq_work_run(); 663 break; 664 #endif 665 666 case IPI_COMPLETION: 667 ipi_complete(cpu); 668 break; 669 670 case IPI_CPU_BACKTRACE: 671 printk_nmi_enter(); 672 nmi_cpu_backtrace(get_irq_regs()); 673 printk_nmi_exit(); 674 break; 675 676 default: 677 pr_crit("CPU%u: Unknown IPI message 0x%x\n", 678 cpu, ipinr); 679 break; 680 } 681 682 if ((unsigned)ipinr < NR_IPI) 683 trace_ipi_exit_rcuidle(ipi_types[ipinr]); 684 } 685 686 /* Legacy version, should go away once all irqchips have been converted */ 687 void handle_IPI(int ipinr, struct pt_regs *regs) 688 { 689 struct pt_regs *old_regs = set_irq_regs(regs); 690 691 irq_enter(); 692 do_handle_IPI(ipinr); 693 irq_exit(); 694 695 set_irq_regs(old_regs); 696 } 697 698 static irqreturn_t ipi_handler(int irq, void *data) 699 { 700 do_handle_IPI(irq - ipi_irq_base); 701 return IRQ_HANDLED; 702 } 703 704 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr) 705 { 706 trace_ipi_raise_rcuidle(target, ipi_types[ipinr]); 707 __ipi_send_mask(ipi_desc[ipinr], target); 708 } 709 710 static void ipi_setup(int cpu) 711 { 712 int i; 713 714 if (WARN_ON_ONCE(!ipi_irq_base)) 715 return; 716 717 for (i = 0; i < nr_ipi; i++) 718 enable_percpu_irq(ipi_irq_base + i, 0); 719 } 720 721 void __init set_smp_ipi_range(int ipi_base, int n) 722 { 723 int i; 724 725 WARN_ON(n < MAX_IPI); 726 nr_ipi = min(n, MAX_IPI); 727 728 for (i = 0; i < nr_ipi; i++) { 729 int err; 730 731 err = request_percpu_irq(ipi_base + i, ipi_handler, 732 "IPI", &irq_stat); 733 WARN_ON(err); 734 735 ipi_desc[i] = irq_to_desc(ipi_base + i); 736 irq_set_status_flags(ipi_base + i, IRQ_HIDDEN); 737 } 738 739 ipi_irq_base = ipi_base; 740 741 /* Setup the boot CPU immediately */ 742 ipi_setup(smp_processor_id()); 743 } 744 745 void smp_send_reschedule(int cpu) 746 { 747 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); 748 } 749 750 void smp_send_stop(void) 751 { 752 unsigned long timeout; 753 struct cpumask mask; 754 755 cpumask_copy(&mask, cpu_online_mask); 756 cpumask_clear_cpu(smp_processor_id(), &mask); 757 if (!cpumask_empty(&mask)) 758 smp_cross_call(&mask, IPI_CPU_STOP); 759 760 /* Wait up to one second for other CPUs to stop */ 761 timeout = USEC_PER_SEC; 762 while (num_online_cpus() > 1 && timeout--) 763 udelay(1); 764 765 if (num_online_cpus() > 1) 766 pr_warn("SMP: failed to stop secondary CPUs\n"); 767 } 768 769 /* In case panic() and panic() called at the same time on CPU1 and CPU2, 770 * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop() 771 * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online, 772 * kdump fails. So split out the panic_smp_self_stop() and add 773 * set_cpu_online(smp_processor_id(), false). 774 */ 775 void panic_smp_self_stop(void) 776 { 777 pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n", 778 smp_processor_id()); 779 set_cpu_online(smp_processor_id(), false); 780 while (1) 781 cpu_relax(); 782 } 783 784 /* 785 * not supported here 786 */ 787 int setup_profiling_timer(unsigned int multiplier) 788 { 789 return -EINVAL; 790 } 791 792 #ifdef CONFIG_CPU_FREQ 793 794 static DEFINE_PER_CPU(unsigned long, l_p_j_ref); 795 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq); 796 static unsigned long global_l_p_j_ref; 797 static unsigned long global_l_p_j_ref_freq; 798 799 static int cpufreq_callback(struct notifier_block *nb, 800 unsigned long val, void *data) 801 { 802 struct cpufreq_freqs *freq = data; 803 struct cpumask *cpus = freq->policy->cpus; 804 int cpu, first = cpumask_first(cpus); 805 unsigned int lpj; 806 807 if (freq->flags & CPUFREQ_CONST_LOOPS) 808 return NOTIFY_OK; 809 810 if (!per_cpu(l_p_j_ref, first)) { 811 for_each_cpu(cpu, cpus) { 812 per_cpu(l_p_j_ref, cpu) = 813 per_cpu(cpu_data, cpu).loops_per_jiffy; 814 per_cpu(l_p_j_ref_freq, cpu) = freq->old; 815 } 816 817 if (!global_l_p_j_ref) { 818 global_l_p_j_ref = loops_per_jiffy; 819 global_l_p_j_ref_freq = freq->old; 820 } 821 } 822 823 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || 824 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) { 825 loops_per_jiffy = cpufreq_scale(global_l_p_j_ref, 826 global_l_p_j_ref_freq, 827 freq->new); 828 829 lpj = cpufreq_scale(per_cpu(l_p_j_ref, first), 830 per_cpu(l_p_j_ref_freq, first), freq->new); 831 for_each_cpu(cpu, cpus) 832 per_cpu(cpu_data, cpu).loops_per_jiffy = lpj; 833 } 834 return NOTIFY_OK; 835 } 836 837 static struct notifier_block cpufreq_notifier = { 838 .notifier_call = cpufreq_callback, 839 }; 840 841 static int __init register_cpufreq_notifier(void) 842 { 843 return cpufreq_register_notifier(&cpufreq_notifier, 844 CPUFREQ_TRANSITION_NOTIFIER); 845 } 846 core_initcall(register_cpufreq_notifier); 847 848 #endif 849 850 static void raise_nmi(cpumask_t *mask) 851 { 852 __ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask); 853 } 854 855 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) 856 { 857 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi); 858 } 859