xref: /linux/arch/arm/kernel/smp.c (revision 787047eea24a2443c366679ae6b5a3873a33b64e)
1 /*
2  *  linux/arch/arm/kernel/smp.c
3  *
4  *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/module.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/cache.h>
17 #include <linux/profile.h>
18 #include <linux/errno.h>
19 #include <linux/mm.h>
20 #include <linux/err.h>
21 #include <linux/cpu.h>
22 #include <linux/seq_file.h>
23 #include <linux/irq.h>
24 #include <linux/percpu.h>
25 #include <linux/clockchips.h>
26 #include <linux/completion.h>
27 #include <linux/cpufreq.h>
28 #include <linux/irq_work.h>
29 
30 #include <linux/atomic.h>
31 #include <asm/smp.h>
32 #include <asm/cacheflush.h>
33 #include <asm/cpu.h>
34 #include <asm/cputype.h>
35 #include <asm/exception.h>
36 #include <asm/idmap.h>
37 #include <asm/topology.h>
38 #include <asm/mmu_context.h>
39 #include <asm/pgtable.h>
40 #include <asm/pgalloc.h>
41 #include <asm/processor.h>
42 #include <asm/sections.h>
43 #include <asm/tlbflush.h>
44 #include <asm/ptrace.h>
45 #include <asm/smp_plat.h>
46 #include <asm/virt.h>
47 #include <asm/mach/arch.h>
48 #include <asm/mpu.h>
49 
50 #define CREATE_TRACE_POINTS
51 #include <trace/events/ipi.h>
52 
53 /*
54  * as from 2.5, kernels no longer have an init_tasks structure
55  * so we need some other way of telling a new secondary core
56  * where to place its SVC stack
57  */
58 struct secondary_data secondary_data;
59 
60 /*
61  * control for which core is the next to come out of the secondary
62  * boot "holding pen"
63  */
64 volatile int pen_release = -1;
65 
66 enum ipi_msg_type {
67 	IPI_WAKEUP,
68 	IPI_TIMER,
69 	IPI_RESCHEDULE,
70 	IPI_CALL_FUNC,
71 	IPI_CALL_FUNC_SINGLE,
72 	IPI_CPU_STOP,
73 	IPI_IRQ_WORK,
74 	IPI_COMPLETION,
75 };
76 
77 static DECLARE_COMPLETION(cpu_running);
78 
79 static struct smp_operations smp_ops;
80 
81 void __init smp_set_ops(struct smp_operations *ops)
82 {
83 	if (ops)
84 		smp_ops = *ops;
85 };
86 
87 static unsigned long get_arch_pgd(pgd_t *pgd)
88 {
89 #ifdef CONFIG_ARM_LPAE
90 	return __phys_to_pfn(virt_to_phys(pgd));
91 #else
92 	return virt_to_phys(pgd);
93 #endif
94 }
95 
96 int __cpu_up(unsigned int cpu, struct task_struct *idle)
97 {
98 	int ret;
99 
100 	if (!smp_ops.smp_boot_secondary)
101 		return -ENOSYS;
102 
103 	/*
104 	 * We need to tell the secondary core where to find
105 	 * its stack and the page tables.
106 	 */
107 	secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
108 #ifdef CONFIG_ARM_MPU
109 	secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
110 #endif
111 
112 #ifdef CONFIG_MMU
113 	secondary_data.pgdir = virt_to_phys(idmap_pgd);
114 	secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
115 #endif
116 	sync_cache_w(&secondary_data);
117 
118 	/*
119 	 * Now bring the CPU into our world.
120 	 */
121 	ret = smp_ops.smp_boot_secondary(cpu, idle);
122 	if (ret == 0) {
123 		/*
124 		 * CPU was successfully started, wait for it
125 		 * to come online or time out.
126 		 */
127 		wait_for_completion_timeout(&cpu_running,
128 						 msecs_to_jiffies(1000));
129 
130 		if (!cpu_online(cpu)) {
131 			pr_crit("CPU%u: failed to come online\n", cpu);
132 			ret = -EIO;
133 		}
134 	} else {
135 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
136 	}
137 
138 
139 	memset(&secondary_data, 0, sizeof(secondary_data));
140 	return ret;
141 }
142 
143 /* platform specific SMP operations */
144 void __init smp_init_cpus(void)
145 {
146 	if (smp_ops.smp_init_cpus)
147 		smp_ops.smp_init_cpus();
148 }
149 
150 int platform_can_secondary_boot(void)
151 {
152 	return !!smp_ops.smp_boot_secondary;
153 }
154 
155 int platform_can_cpu_hotplug(void)
156 {
157 #ifdef CONFIG_HOTPLUG_CPU
158 	if (smp_ops.cpu_kill)
159 		return 1;
160 #endif
161 
162 	return 0;
163 }
164 
165 #ifdef CONFIG_HOTPLUG_CPU
166 static int platform_cpu_kill(unsigned int cpu)
167 {
168 	if (smp_ops.cpu_kill)
169 		return smp_ops.cpu_kill(cpu);
170 	return 1;
171 }
172 
173 static int platform_cpu_disable(unsigned int cpu)
174 {
175 	if (smp_ops.cpu_disable)
176 		return smp_ops.cpu_disable(cpu);
177 
178 	return 0;
179 }
180 
181 int platform_can_hotplug_cpu(unsigned int cpu)
182 {
183 	/* cpu_die must be specified to support hotplug */
184 	if (!smp_ops.cpu_die)
185 		return 0;
186 
187 	if (smp_ops.cpu_can_disable)
188 		return smp_ops.cpu_can_disable(cpu);
189 
190 	/*
191 	 * By default, allow disabling all CPUs except the first one,
192 	 * since this is special on a lot of platforms, e.g. because
193 	 * of clock tick interrupts.
194 	 */
195 	return cpu != 0;
196 }
197 
198 /*
199  * __cpu_disable runs on the processor to be shutdown.
200  */
201 int __cpu_disable(void)
202 {
203 	unsigned int cpu = smp_processor_id();
204 	int ret;
205 
206 	ret = platform_cpu_disable(cpu);
207 	if (ret)
208 		return ret;
209 
210 	/*
211 	 * Take this CPU offline.  Once we clear this, we can't return,
212 	 * and we must not schedule until we're ready to give up the cpu.
213 	 */
214 	set_cpu_online(cpu, false);
215 
216 	/*
217 	 * OK - migrate IRQs away from this CPU
218 	 */
219 	migrate_irqs();
220 
221 	/*
222 	 * Flush user cache and TLB mappings, and then remove this CPU
223 	 * from the vm mask set of all processes.
224 	 *
225 	 * Caches are flushed to the Level of Unification Inner Shareable
226 	 * to write-back dirty lines to unified caches shared by all CPUs.
227 	 */
228 	flush_cache_louis();
229 	local_flush_tlb_all();
230 
231 	clear_tasks_mm_cpumask(cpu);
232 
233 	return 0;
234 }
235 
236 static DECLARE_COMPLETION(cpu_died);
237 
238 /*
239  * called on the thread which is asking for a CPU to be shutdown -
240  * waits until shutdown has completed, or it is timed out.
241  */
242 void __cpu_die(unsigned int cpu)
243 {
244 	if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
245 		pr_err("CPU%u: cpu didn't die\n", cpu);
246 		return;
247 	}
248 	pr_notice("CPU%u: shutdown\n", cpu);
249 
250 	/*
251 	 * platform_cpu_kill() is generally expected to do the powering off
252 	 * and/or cutting of clocks to the dying CPU.  Optionally, this may
253 	 * be done by the CPU which is dying in preference to supporting
254 	 * this call, but that means there is _no_ synchronisation between
255 	 * the requesting CPU and the dying CPU actually losing power.
256 	 */
257 	if (!platform_cpu_kill(cpu))
258 		pr_err("CPU%u: unable to kill\n", cpu);
259 }
260 
261 /*
262  * Called from the idle thread for the CPU which has been shutdown.
263  *
264  * Note that we disable IRQs here, but do not re-enable them
265  * before returning to the caller. This is also the behaviour
266  * of the other hotplug-cpu capable cores, so presumably coming
267  * out of idle fixes this.
268  */
269 void __ref cpu_die(void)
270 {
271 	unsigned int cpu = smp_processor_id();
272 
273 	idle_task_exit();
274 
275 	local_irq_disable();
276 
277 	/*
278 	 * Flush the data out of the L1 cache for this CPU.  This must be
279 	 * before the completion to ensure that data is safely written out
280 	 * before platform_cpu_kill() gets called - which may disable
281 	 * *this* CPU and power down its cache.
282 	 */
283 	flush_cache_louis();
284 
285 	/*
286 	 * Tell __cpu_die() that this CPU is now safe to dispose of.  Once
287 	 * this returns, power and/or clocks can be removed at any point
288 	 * from this CPU and its cache by platform_cpu_kill().
289 	 */
290 	complete(&cpu_died);
291 
292 	/*
293 	 * Ensure that the cache lines associated with that completion are
294 	 * written out.  This covers the case where _this_ CPU is doing the
295 	 * powering down, to ensure that the completion is visible to the
296 	 * CPU waiting for this one.
297 	 */
298 	flush_cache_louis();
299 
300 	/*
301 	 * The actual CPU shutdown procedure is at least platform (if not
302 	 * CPU) specific.  This may remove power, or it may simply spin.
303 	 *
304 	 * Platforms are generally expected *NOT* to return from this call,
305 	 * although there are some which do because they have no way to
306 	 * power down the CPU.  These platforms are the _only_ reason we
307 	 * have a return path which uses the fragment of assembly below.
308 	 *
309 	 * The return path should not be used for platforms which can
310 	 * power off the CPU.
311 	 */
312 	if (smp_ops.cpu_die)
313 		smp_ops.cpu_die(cpu);
314 
315 	pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
316 		cpu);
317 
318 	/*
319 	 * Do not return to the idle loop - jump back to the secondary
320 	 * cpu initialisation.  There's some initialisation which needs
321 	 * to be repeated to undo the effects of taking the CPU offline.
322 	 */
323 	__asm__("mov	sp, %0\n"
324 	"	mov	fp, #0\n"
325 	"	b	secondary_start_kernel"
326 		:
327 		: "r" (task_stack_page(current) + THREAD_SIZE - 8));
328 }
329 #endif /* CONFIG_HOTPLUG_CPU */
330 
331 /*
332  * Called by both boot and secondaries to move global data into
333  * per-processor storage.
334  */
335 static void smp_store_cpu_info(unsigned int cpuid)
336 {
337 	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
338 
339 	cpu_info->loops_per_jiffy = loops_per_jiffy;
340 	cpu_info->cpuid = read_cpuid_id();
341 
342 	store_cpu_topology(cpuid);
343 }
344 
345 /*
346  * This is the secondary CPU boot entry.  We're using this CPUs
347  * idle thread stack, but a set of temporary page tables.
348  */
349 asmlinkage void secondary_start_kernel(void)
350 {
351 	struct mm_struct *mm = &init_mm;
352 	unsigned int cpu;
353 
354 	/*
355 	 * The identity mapping is uncached (strongly ordered), so
356 	 * switch away from it before attempting any exclusive accesses.
357 	 */
358 	cpu_switch_mm(mm->pgd, mm);
359 	local_flush_bp_all();
360 	enter_lazy_tlb(mm, current);
361 	local_flush_tlb_all();
362 
363 	/*
364 	 * All kernel threads share the same mm context; grab a
365 	 * reference and switch to it.
366 	 */
367 	cpu = smp_processor_id();
368 	atomic_inc(&mm->mm_count);
369 	current->active_mm = mm;
370 	cpumask_set_cpu(cpu, mm_cpumask(mm));
371 
372 	cpu_init();
373 
374 	pr_debug("CPU%u: Booted secondary processor\n", cpu);
375 
376 	preempt_disable();
377 	trace_hardirqs_off();
378 
379 	/*
380 	 * Give the platform a chance to do its own initialisation.
381 	 */
382 	if (smp_ops.smp_secondary_init)
383 		smp_ops.smp_secondary_init(cpu);
384 
385 	notify_cpu_starting(cpu);
386 
387 	calibrate_delay();
388 
389 	smp_store_cpu_info(cpu);
390 
391 	/*
392 	 * OK, now it's safe to let the boot CPU continue.  Wait for
393 	 * the CPU migration code to notice that the CPU is online
394 	 * before we continue - which happens after __cpu_up returns.
395 	 */
396 	set_cpu_online(cpu, true);
397 	complete(&cpu_running);
398 
399 	local_irq_enable();
400 	local_fiq_enable();
401 
402 	/*
403 	 * OK, it's off to the idle thread for us
404 	 */
405 	cpu_startup_entry(CPUHP_ONLINE);
406 }
407 
408 void __init smp_cpus_done(unsigned int max_cpus)
409 {
410 	int cpu;
411 	unsigned long bogosum = 0;
412 
413 	for_each_online_cpu(cpu)
414 		bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
415 
416 	printk(KERN_INFO "SMP: Total of %d processors activated "
417 	       "(%lu.%02lu BogoMIPS).\n",
418 	       num_online_cpus(),
419 	       bogosum / (500000/HZ),
420 	       (bogosum / (5000/HZ)) % 100);
421 
422 	hyp_mode_check();
423 }
424 
425 void __init smp_prepare_boot_cpu(void)
426 {
427 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
428 }
429 
430 void __init smp_prepare_cpus(unsigned int max_cpus)
431 {
432 	unsigned int ncores = num_possible_cpus();
433 
434 	init_cpu_topology();
435 
436 	smp_store_cpu_info(smp_processor_id());
437 
438 	/*
439 	 * are we trying to boot more cores than exist?
440 	 */
441 	if (max_cpus > ncores)
442 		max_cpus = ncores;
443 	if (ncores > 1 && max_cpus) {
444 		/*
445 		 * Initialise the present map, which describes the set of CPUs
446 		 * actually populated at the present time. A platform should
447 		 * re-initialize the map in the platforms smp_prepare_cpus()
448 		 * if present != possible (e.g. physical hotplug).
449 		 */
450 		init_cpu_present(cpu_possible_mask);
451 
452 		/*
453 		 * Initialise the SCU if there are more than one CPU
454 		 * and let them know where to start.
455 		 */
456 		if (smp_ops.smp_prepare_cpus)
457 			smp_ops.smp_prepare_cpus(max_cpus);
458 	}
459 }
460 
461 static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
462 
463 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
464 {
465 	if (!__smp_cross_call)
466 		__smp_cross_call = fn;
467 }
468 
469 static const char *ipi_types[NR_IPI] __tracepoint_string = {
470 #define S(x,s)	[x] = s
471 	S(IPI_WAKEUP, "CPU wakeup interrupts"),
472 	S(IPI_TIMER, "Timer broadcast interrupts"),
473 	S(IPI_RESCHEDULE, "Rescheduling interrupts"),
474 	S(IPI_CALL_FUNC, "Function call interrupts"),
475 	S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
476 	S(IPI_CPU_STOP, "CPU stop interrupts"),
477 	S(IPI_IRQ_WORK, "IRQ work interrupts"),
478 	S(IPI_COMPLETION, "completion interrupts"),
479 };
480 
481 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
482 {
483 	trace_ipi_raise(target, ipi_types[ipinr]);
484 	__smp_cross_call(target, ipinr);
485 }
486 
487 void show_ipi_list(struct seq_file *p, int prec)
488 {
489 	unsigned int cpu, i;
490 
491 	for (i = 0; i < NR_IPI; i++) {
492 		seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
493 
494 		for_each_online_cpu(cpu)
495 			seq_printf(p, "%10u ",
496 				   __get_irq_stat(cpu, ipi_irqs[i]));
497 
498 		seq_printf(p, " %s\n", ipi_types[i]);
499 	}
500 }
501 
502 u64 smp_irq_stat_cpu(unsigned int cpu)
503 {
504 	u64 sum = 0;
505 	int i;
506 
507 	for (i = 0; i < NR_IPI; i++)
508 		sum += __get_irq_stat(cpu, ipi_irqs[i]);
509 
510 	return sum;
511 }
512 
513 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
514 {
515 	smp_cross_call(mask, IPI_CALL_FUNC);
516 }
517 
518 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
519 {
520 	smp_cross_call(mask, IPI_WAKEUP);
521 }
522 
523 void arch_send_call_function_single_ipi(int cpu)
524 {
525 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
526 }
527 
528 #ifdef CONFIG_IRQ_WORK
529 void arch_irq_work_raise(void)
530 {
531 	if (arch_irq_work_has_interrupt())
532 		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
533 }
534 #endif
535 
536 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
537 void tick_broadcast(const struct cpumask *mask)
538 {
539 	smp_cross_call(mask, IPI_TIMER);
540 }
541 #endif
542 
543 static DEFINE_RAW_SPINLOCK(stop_lock);
544 
545 /*
546  * ipi_cpu_stop - handle IPI from smp_send_stop()
547  */
548 static void ipi_cpu_stop(unsigned int cpu)
549 {
550 	if (system_state == SYSTEM_BOOTING ||
551 	    system_state == SYSTEM_RUNNING) {
552 		raw_spin_lock(&stop_lock);
553 		pr_crit("CPU%u: stopping\n", cpu);
554 		dump_stack();
555 		raw_spin_unlock(&stop_lock);
556 	}
557 
558 	set_cpu_online(cpu, false);
559 
560 	local_fiq_disable();
561 	local_irq_disable();
562 
563 	while (1)
564 		cpu_relax();
565 }
566 
567 static DEFINE_PER_CPU(struct completion *, cpu_completion);
568 
569 int register_ipi_completion(struct completion *completion, int cpu)
570 {
571 	per_cpu(cpu_completion, cpu) = completion;
572 	return IPI_COMPLETION;
573 }
574 
575 static void ipi_complete(unsigned int cpu)
576 {
577 	complete(per_cpu(cpu_completion, cpu));
578 }
579 
580 /*
581  * Main handler for inter-processor interrupts
582  */
583 asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
584 {
585 	handle_IPI(ipinr, regs);
586 }
587 
588 void handle_IPI(int ipinr, struct pt_regs *regs)
589 {
590 	unsigned int cpu = smp_processor_id();
591 	struct pt_regs *old_regs = set_irq_regs(regs);
592 
593 	if ((unsigned)ipinr < NR_IPI) {
594 		trace_ipi_entry(ipi_types[ipinr]);
595 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);
596 	}
597 
598 	switch (ipinr) {
599 	case IPI_WAKEUP:
600 		break;
601 
602 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
603 	case IPI_TIMER:
604 		irq_enter();
605 		tick_receive_broadcast();
606 		irq_exit();
607 		break;
608 #endif
609 
610 	case IPI_RESCHEDULE:
611 		scheduler_ipi();
612 		break;
613 
614 	case IPI_CALL_FUNC:
615 		irq_enter();
616 		generic_smp_call_function_interrupt();
617 		irq_exit();
618 		break;
619 
620 	case IPI_CALL_FUNC_SINGLE:
621 		irq_enter();
622 		generic_smp_call_function_single_interrupt();
623 		irq_exit();
624 		break;
625 
626 	case IPI_CPU_STOP:
627 		irq_enter();
628 		ipi_cpu_stop(cpu);
629 		irq_exit();
630 		break;
631 
632 #ifdef CONFIG_IRQ_WORK
633 	case IPI_IRQ_WORK:
634 		irq_enter();
635 		irq_work_run();
636 		irq_exit();
637 		break;
638 #endif
639 
640 	case IPI_COMPLETION:
641 		irq_enter();
642 		ipi_complete(cpu);
643 		irq_exit();
644 		break;
645 
646 	default:
647 		pr_crit("CPU%u: Unknown IPI message 0x%x\n",
648 		        cpu, ipinr);
649 		break;
650 	}
651 
652 	if ((unsigned)ipinr < NR_IPI)
653 		trace_ipi_exit(ipi_types[ipinr]);
654 	set_irq_regs(old_regs);
655 }
656 
657 void smp_send_reschedule(int cpu)
658 {
659 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
660 }
661 
662 void smp_send_stop(void)
663 {
664 	unsigned long timeout;
665 	struct cpumask mask;
666 
667 	cpumask_copy(&mask, cpu_online_mask);
668 	cpumask_clear_cpu(smp_processor_id(), &mask);
669 	if (!cpumask_empty(&mask))
670 		smp_cross_call(&mask, IPI_CPU_STOP);
671 
672 	/* Wait up to one second for other CPUs to stop */
673 	timeout = USEC_PER_SEC;
674 	while (num_online_cpus() > 1 && timeout--)
675 		udelay(1);
676 
677 	if (num_online_cpus() > 1)
678 		pr_warn("SMP: failed to stop secondary CPUs\n");
679 }
680 
681 /*
682  * not supported here
683  */
684 int setup_profiling_timer(unsigned int multiplier)
685 {
686 	return -EINVAL;
687 }
688 
689 #ifdef CONFIG_CPU_FREQ
690 
691 static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
692 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
693 static unsigned long global_l_p_j_ref;
694 static unsigned long global_l_p_j_ref_freq;
695 
696 static int cpufreq_callback(struct notifier_block *nb,
697 					unsigned long val, void *data)
698 {
699 	struct cpufreq_freqs *freq = data;
700 	int cpu = freq->cpu;
701 
702 	if (freq->flags & CPUFREQ_CONST_LOOPS)
703 		return NOTIFY_OK;
704 
705 	if (!per_cpu(l_p_j_ref, cpu)) {
706 		per_cpu(l_p_j_ref, cpu) =
707 			per_cpu(cpu_data, cpu).loops_per_jiffy;
708 		per_cpu(l_p_j_ref_freq, cpu) = freq->old;
709 		if (!global_l_p_j_ref) {
710 			global_l_p_j_ref = loops_per_jiffy;
711 			global_l_p_j_ref_freq = freq->old;
712 		}
713 	}
714 
715 	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
716 	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
717 		loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
718 						global_l_p_j_ref_freq,
719 						freq->new);
720 		per_cpu(cpu_data, cpu).loops_per_jiffy =
721 			cpufreq_scale(per_cpu(l_p_j_ref, cpu),
722 					per_cpu(l_p_j_ref_freq, cpu),
723 					freq->new);
724 	}
725 	return NOTIFY_OK;
726 }
727 
728 static struct notifier_block cpufreq_notifier = {
729 	.notifier_call  = cpufreq_callback,
730 };
731 
732 static int __init register_cpufreq_notifier(void)
733 {
734 	return cpufreq_register_notifier(&cpufreq_notifier,
735 						CPUFREQ_TRANSITION_NOTIFIER);
736 }
737 core_initcall(register_cpufreq_notifier);
738 
739 #endif
740