xref: /linux/arch/arm/kernel/ptrace.c (revision 9ce7677cfd7cd871adb457c80bea3b581b839641)
1 /*
2  *  linux/arch/arm/kernel/ptrace.c
3  *
4  *  By Ross Biro 1/23/92
5  * edited by Linus Torvalds
6  * ARM modifications Copyright (C) 2000 Russell King
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/config.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/mm.h>
16 #include <linux/smp.h>
17 #include <linux/smp_lock.h>
18 #include <linux/ptrace.h>
19 #include <linux/user.h>
20 #include <linux/security.h>
21 #include <linux/init.h>
22 #include <linux/signal.h>
23 
24 #include <asm/uaccess.h>
25 #include <asm/pgtable.h>
26 #include <asm/system.h>
27 #include <asm/traps.h>
28 
29 #include "ptrace.h"
30 
31 #define REG_PC	15
32 #define REG_PSR	16
33 /*
34  * does not yet catch signals sent when the child dies.
35  * in exit.c or in signal.c.
36  */
37 
38 #if 0
39 /*
40  * Breakpoint SWI instruction: SWI &9F0001
41  */
42 #define BREAKINST_ARM	0xef9f0001
43 #define BREAKINST_THUMB	0xdf00		/* fill this in later */
44 #else
45 /*
46  * New breakpoints - use an undefined instruction.  The ARM architecture
47  * reference manual guarantees that the following instruction space
48  * will produce an undefined instruction exception on all CPUs:
49  *
50  *  ARM:   xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
51  *  Thumb: 1101 1110 xxxx xxxx
52  */
53 #define BREAKINST_ARM	0xe7f001f0
54 #define BREAKINST_THUMB	0xde01
55 #endif
56 
57 /*
58  * Get the address of the live pt_regs for the specified task.
59  * These are saved onto the top kernel stack when the process
60  * is not running.
61  *
62  * Note: if a user thread is execve'd from kernel space, the
63  * kernel stack will not be empty on entry to the kernel, so
64  * ptracing these tasks will fail.
65  */
66 static inline struct pt_regs *
67 get_user_regs(struct task_struct *task)
68 {
69 	return (struct pt_regs *)
70 		((unsigned long)task->thread_info + THREAD_SIZE -
71 				 8 - sizeof(struct pt_regs));
72 }
73 
74 /*
75  * this routine will get a word off of the processes privileged stack.
76  * the offset is how far from the base addr as stored in the THREAD.
77  * this routine assumes that all the privileged stacks are in our
78  * data space.
79  */
80 static inline long get_user_reg(struct task_struct *task, int offset)
81 {
82 	return get_user_regs(task)->uregs[offset];
83 }
84 
85 /*
86  * this routine will put a word on the processes privileged stack.
87  * the offset is how far from the base addr as stored in the THREAD.
88  * this routine assumes that all the privileged stacks are in our
89  * data space.
90  */
91 static inline int
92 put_user_reg(struct task_struct *task, int offset, long data)
93 {
94 	struct pt_regs newregs, *regs = get_user_regs(task);
95 	int ret = -EINVAL;
96 
97 	newregs = *regs;
98 	newregs.uregs[offset] = data;
99 
100 	if (valid_user_regs(&newregs)) {
101 		regs->uregs[offset] = data;
102 		ret = 0;
103 	}
104 
105 	return ret;
106 }
107 
108 static inline int
109 read_u32(struct task_struct *task, unsigned long addr, u32 *res)
110 {
111 	int ret;
112 
113 	ret = access_process_vm(task, addr, res, sizeof(*res), 0);
114 
115 	return ret == sizeof(*res) ? 0 : -EIO;
116 }
117 
118 static inline int
119 read_instr(struct task_struct *task, unsigned long addr, u32 *res)
120 {
121 	int ret;
122 
123 	if (addr & 1) {
124 		u16 val;
125 		ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
126 		ret = ret == sizeof(val) ? 0 : -EIO;
127 		*res = val;
128 	} else {
129 		u32 val;
130 		ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
131 		ret = ret == sizeof(val) ? 0 : -EIO;
132 		*res = val;
133 	}
134 	return ret;
135 }
136 
137 /*
138  * Get value of register `rn' (in the instruction)
139  */
140 static unsigned long
141 ptrace_getrn(struct task_struct *child, unsigned long insn)
142 {
143 	unsigned int reg = (insn >> 16) & 15;
144 	unsigned long val;
145 
146 	val = get_user_reg(child, reg);
147 	if (reg == 15)
148 		val = pc_pointer(val + 8);
149 
150 	return val;
151 }
152 
153 /*
154  * Get value of operand 2 (in an ALU instruction)
155  */
156 static unsigned long
157 ptrace_getaluop2(struct task_struct *child, unsigned long insn)
158 {
159 	unsigned long val;
160 	int shift;
161 	int type;
162 
163 	if (insn & 1 << 25) {
164 		val = insn & 255;
165 		shift = (insn >> 8) & 15;
166 		type = 3;
167 	} else {
168 		val = get_user_reg (child, insn & 15);
169 
170 		if (insn & (1 << 4))
171 			shift = (int)get_user_reg (child, (insn >> 8) & 15);
172 		else
173 			shift = (insn >> 7) & 31;
174 
175 		type = (insn >> 5) & 3;
176 	}
177 
178 	switch (type) {
179 	case 0:	val <<= shift;	break;
180 	case 1:	val >>= shift;	break;
181 	case 2:
182 		val = (((signed long)val) >> shift);
183 		break;
184 	case 3:
185  		val = (val >> shift) | (val << (32 - shift));
186 		break;
187 	}
188 	return val;
189 }
190 
191 /*
192  * Get value of operand 2 (in a LDR instruction)
193  */
194 static unsigned long
195 ptrace_getldrop2(struct task_struct *child, unsigned long insn)
196 {
197 	unsigned long val;
198 	int shift;
199 	int type;
200 
201 	val = get_user_reg(child, insn & 15);
202 	shift = (insn >> 7) & 31;
203 	type = (insn >> 5) & 3;
204 
205 	switch (type) {
206 	case 0:	val <<= shift;	break;
207 	case 1:	val >>= shift;	break;
208 	case 2:
209 		val = (((signed long)val) >> shift);
210 		break;
211 	case 3:
212  		val = (val >> shift) | (val << (32 - shift));
213 		break;
214 	}
215 	return val;
216 }
217 
218 #define OP_MASK	0x01e00000
219 #define OP_AND	0x00000000
220 #define OP_EOR	0x00200000
221 #define OP_SUB	0x00400000
222 #define OP_RSB	0x00600000
223 #define OP_ADD	0x00800000
224 #define OP_ADC	0x00a00000
225 #define OP_SBC	0x00c00000
226 #define OP_RSC	0x00e00000
227 #define OP_ORR	0x01800000
228 #define OP_MOV	0x01a00000
229 #define OP_BIC	0x01c00000
230 #define OP_MVN	0x01e00000
231 
232 static unsigned long
233 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
234 {
235 	u32 alt = 0;
236 
237 	switch (insn & 0x0e000000) {
238 	case 0x00000000:
239 	case 0x02000000: {
240 		/*
241 		 * data processing
242 		 */
243 		long aluop1, aluop2, ccbit;
244 
245 	        if ((insn & 0x0fffffd0) == 0x012fff10) {
246 		        /*
247 			 * bx or blx
248 			 */
249 			alt = get_user_reg(child, insn & 15);
250 			break;
251 		}
252 
253 
254 		if ((insn & 0xf000) != 0xf000)
255 			break;
256 
257 		aluop1 = ptrace_getrn(child, insn);
258 		aluop2 = ptrace_getaluop2(child, insn);
259 		ccbit  = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
260 
261 		switch (insn & OP_MASK) {
262 		case OP_AND: alt = aluop1 & aluop2;		break;
263 		case OP_EOR: alt = aluop1 ^ aluop2;		break;
264 		case OP_SUB: alt = aluop1 - aluop2;		break;
265 		case OP_RSB: alt = aluop2 - aluop1;		break;
266 		case OP_ADD: alt = aluop1 + aluop2;		break;
267 		case OP_ADC: alt = aluop1 + aluop2 + ccbit;	break;
268 		case OP_SBC: alt = aluop1 - aluop2 + ccbit;	break;
269 		case OP_RSC: alt = aluop2 - aluop1 + ccbit;	break;
270 		case OP_ORR: alt = aluop1 | aluop2;		break;
271 		case OP_MOV: alt = aluop2;			break;
272 		case OP_BIC: alt = aluop1 & ~aluop2;		break;
273 		case OP_MVN: alt = ~aluop2;			break;
274 		}
275 		break;
276 	}
277 
278 	case 0x04000000:
279 	case 0x06000000:
280 		/*
281 		 * ldr
282 		 */
283 		if ((insn & 0x0010f000) == 0x0010f000) {
284 			unsigned long base;
285 
286 			base = ptrace_getrn(child, insn);
287 			if (insn & 1 << 24) {
288 				long aluop2;
289 
290 				if (insn & 0x02000000)
291 					aluop2 = ptrace_getldrop2(child, insn);
292 				else
293 					aluop2 = insn & 0xfff;
294 
295 				if (insn & 1 << 23)
296 					base += aluop2;
297 				else
298 					base -= aluop2;
299 			}
300 			if (read_u32(child, base, &alt) == 0)
301 				alt = pc_pointer(alt);
302 		}
303 		break;
304 
305 	case 0x08000000:
306 		/*
307 		 * ldm
308 		 */
309 		if ((insn & 0x00108000) == 0x00108000) {
310 			unsigned long base;
311 			unsigned int nr_regs;
312 
313 			if (insn & (1 << 23)) {
314 				nr_regs = hweight16(insn & 65535) << 2;
315 
316 				if (!(insn & (1 << 24)))
317 					nr_regs -= 4;
318 			} else {
319 				if (insn & (1 << 24))
320 					nr_regs = -4;
321 				else
322 					nr_regs = 0;
323 			}
324 
325 			base = ptrace_getrn(child, insn);
326 
327 			if (read_u32(child, base + nr_regs, &alt) == 0)
328 				alt = pc_pointer(alt);
329 			break;
330 		}
331 		break;
332 
333 	case 0x0a000000: {
334 		/*
335 		 * bl or b
336 		 */
337 		signed long displ;
338 		/* It's a branch/branch link: instead of trying to
339 		 * figure out whether the branch will be taken or not,
340 		 * we'll put a breakpoint at both locations.  This is
341 		 * simpler, more reliable, and probably not a whole lot
342 		 * slower than the alternative approach of emulating the
343 		 * branch.
344 		 */
345 		displ = (insn & 0x00ffffff) << 8;
346 		displ = (displ >> 6) + 8;
347 		if (displ != 0 && displ != 4)
348 			alt = pc + displ;
349 	    }
350 	    break;
351 	}
352 
353 	return alt;
354 }
355 
356 static int
357 swap_insn(struct task_struct *task, unsigned long addr,
358 	  void *old_insn, void *new_insn, int size)
359 {
360 	int ret;
361 
362 	ret = access_process_vm(task, addr, old_insn, size, 0);
363 	if (ret == size)
364 		ret = access_process_vm(task, addr, new_insn, size, 1);
365 	return ret;
366 }
367 
368 static void
369 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
370 {
371 	int nr = dbg->nsaved;
372 
373 	if (nr < 2) {
374 		u32 new_insn = BREAKINST_ARM;
375 		int res;
376 
377 		res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
378 
379 		if (res == 4) {
380 			dbg->bp[nr].address = addr;
381 			dbg->nsaved += 1;
382 		}
383 	} else
384 		printk(KERN_ERR "ptrace: too many breakpoints\n");
385 }
386 
387 /*
388  * Clear one breakpoint in the user program.  We copy what the hardware
389  * does and use bit 0 of the address to indicate whether this is a Thumb
390  * breakpoint or an ARM breakpoint.
391  */
392 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
393 {
394 	unsigned long addr = bp->address;
395 	union debug_insn old_insn;
396 	int ret;
397 
398 	if (addr & 1) {
399 		ret = swap_insn(task, addr & ~1, &old_insn.thumb,
400 				&bp->insn.thumb, 2);
401 
402 		if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
403 			printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
404 				"0x%08lx (0x%04x)\n", task->comm, task->pid,
405 				addr, old_insn.thumb);
406 	} else {
407 		ret = swap_insn(task, addr & ~3, &old_insn.arm,
408 				&bp->insn.arm, 4);
409 
410 		if (ret != 4 || old_insn.arm != BREAKINST_ARM)
411 			printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
412 				"0x%08lx (0x%08x)\n", task->comm, task->pid,
413 				addr, old_insn.arm);
414 	}
415 }
416 
417 void ptrace_set_bpt(struct task_struct *child)
418 {
419 	struct pt_regs *regs;
420 	unsigned long pc;
421 	u32 insn;
422 	int res;
423 
424 	regs = get_user_regs(child);
425 	pc = instruction_pointer(regs);
426 
427 	if (thumb_mode(regs)) {
428 		printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
429 		return;
430 	}
431 
432 	res = read_instr(child, pc, &insn);
433 	if (!res) {
434 		struct debug_info *dbg = &child->thread.debug;
435 		unsigned long alt;
436 
437 		dbg->nsaved = 0;
438 
439 		alt = get_branch_address(child, pc, insn);
440 		if (alt)
441 			add_breakpoint(child, dbg, alt);
442 
443 		/*
444 		 * Note that we ignore the result of setting the above
445 		 * breakpoint since it may fail.  When it does, this is
446 		 * not so much an error, but a forewarning that we may
447 		 * be receiving a prefetch abort shortly.
448 		 *
449 		 * If we don't set this breakpoint here, then we can
450 		 * lose control of the thread during single stepping.
451 		 */
452 		if (!alt || predicate(insn) != PREDICATE_ALWAYS)
453 			add_breakpoint(child, dbg, pc + 4);
454 	}
455 }
456 
457 /*
458  * Ensure no single-step breakpoint is pending.  Returns non-zero
459  * value if child was being single-stepped.
460  */
461 void ptrace_cancel_bpt(struct task_struct *child)
462 {
463 	int i, nsaved = child->thread.debug.nsaved;
464 
465 	child->thread.debug.nsaved = 0;
466 
467 	if (nsaved > 2) {
468 		printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
469 		nsaved = 2;
470 	}
471 
472 	for (i = 0; i < nsaved; i++)
473 		clear_breakpoint(child, &child->thread.debug.bp[i]);
474 }
475 
476 /*
477  * Called by kernel/ptrace.c when detaching..
478  *
479  * Make sure the single step bit is not set.
480  */
481 void ptrace_disable(struct task_struct *child)
482 {
483 	child->ptrace &= ~PT_SINGLESTEP;
484 	ptrace_cancel_bpt(child);
485 }
486 
487 /*
488  * Handle hitting a breakpoint.
489  */
490 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
491 {
492 	siginfo_t info;
493 
494 	ptrace_cancel_bpt(tsk);
495 
496 	info.si_signo = SIGTRAP;
497 	info.si_errno = 0;
498 	info.si_code  = TRAP_BRKPT;
499 	info.si_addr  = (void __user *)instruction_pointer(regs);
500 
501 	force_sig_info(SIGTRAP, &info, tsk);
502 }
503 
504 static int break_trap(struct pt_regs *regs, unsigned int instr)
505 {
506 	ptrace_break(current, regs);
507 	return 0;
508 }
509 
510 static struct undef_hook arm_break_hook = {
511 	.instr_mask	= 0x0fffffff,
512 	.instr_val	= 0x07f001f0,
513 	.cpsr_mask	= PSR_T_BIT,
514 	.cpsr_val	= 0,
515 	.fn		= break_trap,
516 };
517 
518 static struct undef_hook thumb_break_hook = {
519 	.instr_mask	= 0xffff,
520 	.instr_val	= 0xde01,
521 	.cpsr_mask	= PSR_T_BIT,
522 	.cpsr_val	= PSR_T_BIT,
523 	.fn		= break_trap,
524 };
525 
526 static int __init ptrace_break_init(void)
527 {
528 	register_undef_hook(&arm_break_hook);
529 	register_undef_hook(&thumb_break_hook);
530 	return 0;
531 }
532 
533 core_initcall(ptrace_break_init);
534 
535 /*
536  * Read the word at offset "off" into the "struct user".  We
537  * actually access the pt_regs stored on the kernel stack.
538  */
539 static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
540 			    unsigned long __user *ret)
541 {
542 	unsigned long tmp;
543 
544 	if (off & 3 || off >= sizeof(struct user))
545 		return -EIO;
546 
547 	tmp = 0;
548 	if (off < sizeof(struct pt_regs))
549 		tmp = get_user_reg(tsk, off >> 2);
550 
551 	return put_user(tmp, ret);
552 }
553 
554 /*
555  * Write the word at offset "off" into "struct user".  We
556  * actually access the pt_regs stored on the kernel stack.
557  */
558 static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
559 			     unsigned long val)
560 {
561 	if (off & 3 || off >= sizeof(struct user))
562 		return -EIO;
563 
564 	if (off >= sizeof(struct pt_regs))
565 		return 0;
566 
567 	return put_user_reg(tsk, off >> 2, val);
568 }
569 
570 /*
571  * Get all user integer registers.
572  */
573 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
574 {
575 	struct pt_regs *regs = get_user_regs(tsk);
576 
577 	return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
578 }
579 
580 /*
581  * Set all user integer registers.
582  */
583 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
584 {
585 	struct pt_regs newregs;
586 	int ret;
587 
588 	ret = -EFAULT;
589 	if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
590 		struct pt_regs *regs = get_user_regs(tsk);
591 
592 		ret = -EINVAL;
593 		if (valid_user_regs(&newregs)) {
594 			*regs = newregs;
595 			ret = 0;
596 		}
597 	}
598 
599 	return ret;
600 }
601 
602 /*
603  * Get the child FPU state.
604  */
605 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
606 {
607 	return copy_to_user(ufp, &tsk->thread_info->fpstate,
608 			    sizeof(struct user_fp)) ? -EFAULT : 0;
609 }
610 
611 /*
612  * Set the child FPU state.
613  */
614 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
615 {
616 	struct thread_info *thread = tsk->thread_info;
617 	thread->used_cp[1] = thread->used_cp[2] = 1;
618 	return copy_from_user(&thread->fpstate, ufp,
619 			      sizeof(struct user_fp)) ? -EFAULT : 0;
620 }
621 
622 #ifdef CONFIG_IWMMXT
623 
624 /*
625  * Get the child iWMMXt state.
626  */
627 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
628 {
629 	struct thread_info *thread = tsk->thread_info;
630 	void *ptr = &thread->fpstate;
631 
632 	if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
633 		return -ENODATA;
634 	iwmmxt_task_disable(thread);  /* force it to ram */
635 	/* The iWMMXt state is stored doubleword-aligned.  */
636 	if (((long) ptr) & 4)
637 		ptr += 4;
638 	return copy_to_user(ufp, ptr, 0x98) ? -EFAULT : 0;
639 }
640 
641 /*
642  * Set the child iWMMXt state.
643  */
644 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
645 {
646 	struct thread_info *thread = tsk->thread_info;
647 	void *ptr = &thread->fpstate;
648 
649 	if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
650 		return -EACCES;
651 	iwmmxt_task_release(thread);  /* force a reload */
652 	/* The iWMMXt state is stored doubleword-aligned.  */
653 	if (((long) ptr) & 4)
654 		ptr += 4;
655 	return copy_from_user(ptr, ufp, 0x98) ? -EFAULT : 0;
656 }
657 
658 #endif
659 
660 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
661 {
662 	unsigned long tmp;
663 	int ret;
664 
665 	switch (request) {
666 		/*
667 		 * read word at location "addr" in the child process.
668 		 */
669 		case PTRACE_PEEKTEXT:
670 		case PTRACE_PEEKDATA:
671 			ret = access_process_vm(child, addr, &tmp,
672 						sizeof(unsigned long), 0);
673 			if (ret == sizeof(unsigned long))
674 				ret = put_user(tmp, (unsigned long __user *) data);
675 			else
676 				ret = -EIO;
677 			break;
678 
679 		case PTRACE_PEEKUSR:
680 			ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
681 			break;
682 
683 		/*
684 		 * write the word at location addr.
685 		 */
686 		case PTRACE_POKETEXT:
687 		case PTRACE_POKEDATA:
688 			ret = access_process_vm(child, addr, &data,
689 						sizeof(unsigned long), 1);
690 			if (ret == sizeof(unsigned long))
691 				ret = 0;
692 			else
693 				ret = -EIO;
694 			break;
695 
696 		case PTRACE_POKEUSR:
697 			ret = ptrace_write_user(child, addr, data);
698 			break;
699 
700 		/*
701 		 * continue/restart and stop at next (return from) syscall
702 		 */
703 		case PTRACE_SYSCALL:
704 		case PTRACE_CONT:
705 			ret = -EIO;
706 			if (!valid_signal(data))
707 				break;
708 			if (request == PTRACE_SYSCALL)
709 				set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
710 			else
711 				clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
712 			child->exit_code = data;
713 			/* make sure single-step breakpoint is gone. */
714 			child->ptrace &= ~PT_SINGLESTEP;
715 			ptrace_cancel_bpt(child);
716 			wake_up_process(child);
717 			ret = 0;
718 			break;
719 
720 		/*
721 		 * make the child exit.  Best I can do is send it a sigkill.
722 		 * perhaps it should be put in the status that it wants to
723 		 * exit.
724 		 */
725 		case PTRACE_KILL:
726 			/* make sure single-step breakpoint is gone. */
727 			child->ptrace &= ~PT_SINGLESTEP;
728 			ptrace_cancel_bpt(child);
729 			if (child->exit_state != EXIT_ZOMBIE) {
730 				child->exit_code = SIGKILL;
731 				wake_up_process(child);
732 			}
733 			ret = 0;
734 			break;
735 
736 		/*
737 		 * execute single instruction.
738 		 */
739 		case PTRACE_SINGLESTEP:
740 			ret = -EIO;
741 			if (!valid_signal(data))
742 				break;
743 			child->ptrace |= PT_SINGLESTEP;
744 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
745 			child->exit_code = data;
746 			/* give it a chance to run. */
747 			wake_up_process(child);
748 			ret = 0;
749 			break;
750 
751 		case PTRACE_DETACH:
752 			ret = ptrace_detach(child, data);
753 			break;
754 
755 		case PTRACE_GETREGS:
756 			ret = ptrace_getregs(child, (void __user *)data);
757 			break;
758 
759 		case PTRACE_SETREGS:
760 			ret = ptrace_setregs(child, (void __user *)data);
761 			break;
762 
763 		case PTRACE_GETFPREGS:
764 			ret = ptrace_getfpregs(child, (void __user *)data);
765 			break;
766 
767 		case PTRACE_SETFPREGS:
768 			ret = ptrace_setfpregs(child, (void __user *)data);
769 			break;
770 
771 #ifdef CONFIG_IWMMXT
772 		case PTRACE_GETWMMXREGS:
773 			ret = ptrace_getwmmxregs(child, (void __user *)data);
774 			break;
775 
776 		case PTRACE_SETWMMXREGS:
777 			ret = ptrace_setwmmxregs(child, (void __user *)data);
778 			break;
779 #endif
780 
781 		case PTRACE_GET_THREAD_AREA:
782 			ret = put_user(child->thread_info->tp_value,
783 				       (unsigned long __user *) data);
784 			break;
785 
786 		default:
787 			ret = ptrace_request(child, request, addr, data);
788 			break;
789 	}
790 
791 	return ret;
792 }
793 
794 asmlinkage void syscall_trace(int why, struct pt_regs *regs)
795 {
796 	unsigned long ip;
797 
798 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
799 		return;
800 	if (!(current->ptrace & PT_PTRACED))
801 		return;
802 
803 	/*
804 	 * Save IP.  IP is used to denote syscall entry/exit:
805 	 *  IP = 0 -> entry, = 1 -> exit
806 	 */
807 	ip = regs->ARM_ip;
808 	regs->ARM_ip = why;
809 
810 	/* the 0x80 provides a way for the tracing parent to distinguish
811 	   between a syscall stop and SIGTRAP delivery */
812 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
813 				 ? 0x80 : 0));
814 	/*
815 	 * this isn't the same as continuing with a signal, but it will do
816 	 * for normal use.  strace only continues with a signal if the
817 	 * stopping signal is not SIGTRAP.  -brl
818 	 */
819 	if (current->exit_code) {
820 		send_sig(current->exit_code, current, 1);
821 		current->exit_code = 0;
822 	}
823 	regs->ARM_ip = ip;
824 }
825