xref: /linux/arch/arm/kernel/ptrace.c (revision 96de0e252cedffad61b3cb5e05662c591898e69a)
1 /*
2  *  linux/arch/arm/kernel/ptrace.c
3  *
4  *  By Ross Biro 1/23/92
5  * edited by Linus Torvalds
6  * ARM modifications Copyright (C) 2000 Russell King
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/mm.h>
15 #include <linux/smp.h>
16 #include <linux/ptrace.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/init.h>
20 #include <linux/signal.h>
21 
22 #include <asm/uaccess.h>
23 #include <asm/pgtable.h>
24 #include <asm/system.h>
25 #include <asm/traps.h>
26 
27 #include "ptrace.h"
28 
29 #define REG_PC	15
30 #define REG_PSR	16
31 /*
32  * does not yet catch signals sent when the child dies.
33  * in exit.c or in signal.c.
34  */
35 
36 #if 0
37 /*
38  * Breakpoint SWI instruction: SWI &9F0001
39  */
40 #define BREAKINST_ARM	0xef9f0001
41 #define BREAKINST_THUMB	0xdf00		/* fill this in later */
42 #else
43 /*
44  * New breakpoints - use an undefined instruction.  The ARM architecture
45  * reference manual guarantees that the following instruction space
46  * will produce an undefined instruction exception on all CPUs:
47  *
48  *  ARM:   xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
49  *  Thumb: 1101 1110 xxxx xxxx
50  */
51 #define BREAKINST_ARM	0xe7f001f0
52 #define BREAKINST_THUMB	0xde01
53 #endif
54 
55 /*
56  * this routine will get a word off of the processes privileged stack.
57  * the offset is how far from the base addr as stored in the THREAD.
58  * this routine assumes that all the privileged stacks are in our
59  * data space.
60  */
61 static inline long get_user_reg(struct task_struct *task, int offset)
62 {
63 	return task_pt_regs(task)->uregs[offset];
64 }
65 
66 /*
67  * this routine will put a word on the processes privileged stack.
68  * the offset is how far from the base addr as stored in the THREAD.
69  * this routine assumes that all the privileged stacks are in our
70  * data space.
71  */
72 static inline int
73 put_user_reg(struct task_struct *task, int offset, long data)
74 {
75 	struct pt_regs newregs, *regs = task_pt_regs(task);
76 	int ret = -EINVAL;
77 
78 	newregs = *regs;
79 	newregs.uregs[offset] = data;
80 
81 	if (valid_user_regs(&newregs)) {
82 		regs->uregs[offset] = data;
83 		ret = 0;
84 	}
85 
86 	return ret;
87 }
88 
89 static inline int
90 read_u32(struct task_struct *task, unsigned long addr, u32 *res)
91 {
92 	int ret;
93 
94 	ret = access_process_vm(task, addr, res, sizeof(*res), 0);
95 
96 	return ret == sizeof(*res) ? 0 : -EIO;
97 }
98 
99 static inline int
100 read_instr(struct task_struct *task, unsigned long addr, u32 *res)
101 {
102 	int ret;
103 
104 	if (addr & 1) {
105 		u16 val;
106 		ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
107 		ret = ret == sizeof(val) ? 0 : -EIO;
108 		*res = val;
109 	} else {
110 		u32 val;
111 		ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
112 		ret = ret == sizeof(val) ? 0 : -EIO;
113 		*res = val;
114 	}
115 	return ret;
116 }
117 
118 /*
119  * Get value of register `rn' (in the instruction)
120  */
121 static unsigned long
122 ptrace_getrn(struct task_struct *child, unsigned long insn)
123 {
124 	unsigned int reg = (insn >> 16) & 15;
125 	unsigned long val;
126 
127 	val = get_user_reg(child, reg);
128 	if (reg == 15)
129 		val = pc_pointer(val + 8);
130 
131 	return val;
132 }
133 
134 /*
135  * Get value of operand 2 (in an ALU instruction)
136  */
137 static unsigned long
138 ptrace_getaluop2(struct task_struct *child, unsigned long insn)
139 {
140 	unsigned long val;
141 	int shift;
142 	int type;
143 
144 	if (insn & 1 << 25) {
145 		val = insn & 255;
146 		shift = (insn >> 8) & 15;
147 		type = 3;
148 	} else {
149 		val = get_user_reg (child, insn & 15);
150 
151 		if (insn & (1 << 4))
152 			shift = (int)get_user_reg (child, (insn >> 8) & 15);
153 		else
154 			shift = (insn >> 7) & 31;
155 
156 		type = (insn >> 5) & 3;
157 	}
158 
159 	switch (type) {
160 	case 0:	val <<= shift;	break;
161 	case 1:	val >>= shift;	break;
162 	case 2:
163 		val = (((signed long)val) >> shift);
164 		break;
165 	case 3:
166  		val = (val >> shift) | (val << (32 - shift));
167 		break;
168 	}
169 	return val;
170 }
171 
172 /*
173  * Get value of operand 2 (in a LDR instruction)
174  */
175 static unsigned long
176 ptrace_getldrop2(struct task_struct *child, unsigned long insn)
177 {
178 	unsigned long val;
179 	int shift;
180 	int type;
181 
182 	val = get_user_reg(child, insn & 15);
183 	shift = (insn >> 7) & 31;
184 	type = (insn >> 5) & 3;
185 
186 	switch (type) {
187 	case 0:	val <<= shift;	break;
188 	case 1:	val >>= shift;	break;
189 	case 2:
190 		val = (((signed long)val) >> shift);
191 		break;
192 	case 3:
193  		val = (val >> shift) | (val << (32 - shift));
194 		break;
195 	}
196 	return val;
197 }
198 
199 #define OP_MASK	0x01e00000
200 #define OP_AND	0x00000000
201 #define OP_EOR	0x00200000
202 #define OP_SUB	0x00400000
203 #define OP_RSB	0x00600000
204 #define OP_ADD	0x00800000
205 #define OP_ADC	0x00a00000
206 #define OP_SBC	0x00c00000
207 #define OP_RSC	0x00e00000
208 #define OP_ORR	0x01800000
209 #define OP_MOV	0x01a00000
210 #define OP_BIC	0x01c00000
211 #define OP_MVN	0x01e00000
212 
213 static unsigned long
214 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
215 {
216 	u32 alt = 0;
217 
218 	switch (insn & 0x0e000000) {
219 	case 0x00000000:
220 	case 0x02000000: {
221 		/*
222 		 * data processing
223 		 */
224 		long aluop1, aluop2, ccbit;
225 
226 	        if ((insn & 0x0fffffd0) == 0x012fff10) {
227 		        /*
228 			 * bx or blx
229 			 */
230 			alt = get_user_reg(child, insn & 15);
231 			break;
232 		}
233 
234 
235 		if ((insn & 0xf000) != 0xf000)
236 			break;
237 
238 		aluop1 = ptrace_getrn(child, insn);
239 		aluop2 = ptrace_getaluop2(child, insn);
240 		ccbit  = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
241 
242 		switch (insn & OP_MASK) {
243 		case OP_AND: alt = aluop1 & aluop2;		break;
244 		case OP_EOR: alt = aluop1 ^ aluop2;		break;
245 		case OP_SUB: alt = aluop1 - aluop2;		break;
246 		case OP_RSB: alt = aluop2 - aluop1;		break;
247 		case OP_ADD: alt = aluop1 + aluop2;		break;
248 		case OP_ADC: alt = aluop1 + aluop2 + ccbit;	break;
249 		case OP_SBC: alt = aluop1 - aluop2 + ccbit;	break;
250 		case OP_RSC: alt = aluop2 - aluop1 + ccbit;	break;
251 		case OP_ORR: alt = aluop1 | aluop2;		break;
252 		case OP_MOV: alt = aluop2;			break;
253 		case OP_BIC: alt = aluop1 & ~aluop2;		break;
254 		case OP_MVN: alt = ~aluop2;			break;
255 		}
256 		break;
257 	}
258 
259 	case 0x04000000:
260 	case 0x06000000:
261 		/*
262 		 * ldr
263 		 */
264 		if ((insn & 0x0010f000) == 0x0010f000) {
265 			unsigned long base;
266 
267 			base = ptrace_getrn(child, insn);
268 			if (insn & 1 << 24) {
269 				long aluop2;
270 
271 				if (insn & 0x02000000)
272 					aluop2 = ptrace_getldrop2(child, insn);
273 				else
274 					aluop2 = insn & 0xfff;
275 
276 				if (insn & 1 << 23)
277 					base += aluop2;
278 				else
279 					base -= aluop2;
280 			}
281 			if (read_u32(child, base, &alt) == 0)
282 				alt = pc_pointer(alt);
283 		}
284 		break;
285 
286 	case 0x08000000:
287 		/*
288 		 * ldm
289 		 */
290 		if ((insn & 0x00108000) == 0x00108000) {
291 			unsigned long base;
292 			unsigned int nr_regs;
293 
294 			if (insn & (1 << 23)) {
295 				nr_regs = hweight16(insn & 65535) << 2;
296 
297 				if (!(insn & (1 << 24)))
298 					nr_regs -= 4;
299 			} else {
300 				if (insn & (1 << 24))
301 					nr_regs = -4;
302 				else
303 					nr_regs = 0;
304 			}
305 
306 			base = ptrace_getrn(child, insn);
307 
308 			if (read_u32(child, base + nr_regs, &alt) == 0)
309 				alt = pc_pointer(alt);
310 			break;
311 		}
312 		break;
313 
314 	case 0x0a000000: {
315 		/*
316 		 * bl or b
317 		 */
318 		signed long displ;
319 		/* It's a branch/branch link: instead of trying to
320 		 * figure out whether the branch will be taken or not,
321 		 * we'll put a breakpoint at both locations.  This is
322 		 * simpler, more reliable, and probably not a whole lot
323 		 * slower than the alternative approach of emulating the
324 		 * branch.
325 		 */
326 		displ = (insn & 0x00ffffff) << 8;
327 		displ = (displ >> 6) + 8;
328 		if (displ != 0 && displ != 4)
329 			alt = pc + displ;
330 	    }
331 	    break;
332 	}
333 
334 	return alt;
335 }
336 
337 static int
338 swap_insn(struct task_struct *task, unsigned long addr,
339 	  void *old_insn, void *new_insn, int size)
340 {
341 	int ret;
342 
343 	ret = access_process_vm(task, addr, old_insn, size, 0);
344 	if (ret == size)
345 		ret = access_process_vm(task, addr, new_insn, size, 1);
346 	return ret;
347 }
348 
349 static void
350 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
351 {
352 	int nr = dbg->nsaved;
353 
354 	if (nr < 2) {
355 		u32 new_insn = BREAKINST_ARM;
356 		int res;
357 
358 		res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
359 
360 		if (res == 4) {
361 			dbg->bp[nr].address = addr;
362 			dbg->nsaved += 1;
363 		}
364 	} else
365 		printk(KERN_ERR "ptrace: too many breakpoints\n");
366 }
367 
368 /*
369  * Clear one breakpoint in the user program.  We copy what the hardware
370  * does and use bit 0 of the address to indicate whether this is a Thumb
371  * breakpoint or an ARM breakpoint.
372  */
373 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
374 {
375 	unsigned long addr = bp->address;
376 	union debug_insn old_insn;
377 	int ret;
378 
379 	if (addr & 1) {
380 		ret = swap_insn(task, addr & ~1, &old_insn.thumb,
381 				&bp->insn.thumb, 2);
382 
383 		if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
384 			printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
385 				"0x%08lx (0x%04x)\n", task->comm,
386 				task_pid_nr(task), addr, old_insn.thumb);
387 	} else {
388 		ret = swap_insn(task, addr & ~3, &old_insn.arm,
389 				&bp->insn.arm, 4);
390 
391 		if (ret != 4 || old_insn.arm != BREAKINST_ARM)
392 			printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
393 				"0x%08lx (0x%08x)\n", task->comm,
394 				task_pid_nr(task), addr, old_insn.arm);
395 	}
396 }
397 
398 void ptrace_set_bpt(struct task_struct *child)
399 {
400 	struct pt_regs *regs;
401 	unsigned long pc;
402 	u32 insn;
403 	int res;
404 
405 	regs = task_pt_regs(child);
406 	pc = instruction_pointer(regs);
407 
408 	if (thumb_mode(regs)) {
409 		printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
410 		return;
411 	}
412 
413 	res = read_instr(child, pc, &insn);
414 	if (!res) {
415 		struct debug_info *dbg = &child->thread.debug;
416 		unsigned long alt;
417 
418 		dbg->nsaved = 0;
419 
420 		alt = get_branch_address(child, pc, insn);
421 		if (alt)
422 			add_breakpoint(child, dbg, alt);
423 
424 		/*
425 		 * Note that we ignore the result of setting the above
426 		 * breakpoint since it may fail.  When it does, this is
427 		 * not so much an error, but a forewarning that we may
428 		 * be receiving a prefetch abort shortly.
429 		 *
430 		 * If we don't set this breakpoint here, then we can
431 		 * lose control of the thread during single stepping.
432 		 */
433 		if (!alt || predicate(insn) != PREDICATE_ALWAYS)
434 			add_breakpoint(child, dbg, pc + 4);
435 	}
436 }
437 
438 /*
439  * Ensure no single-step breakpoint is pending.  Returns non-zero
440  * value if child was being single-stepped.
441  */
442 void ptrace_cancel_bpt(struct task_struct *child)
443 {
444 	int i, nsaved = child->thread.debug.nsaved;
445 
446 	child->thread.debug.nsaved = 0;
447 
448 	if (nsaved > 2) {
449 		printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
450 		nsaved = 2;
451 	}
452 
453 	for (i = 0; i < nsaved; i++)
454 		clear_breakpoint(child, &child->thread.debug.bp[i]);
455 }
456 
457 /*
458  * Called by kernel/ptrace.c when detaching..
459  */
460 void ptrace_disable(struct task_struct *child)
461 {
462 	single_step_disable(child);
463 }
464 
465 /*
466  * Handle hitting a breakpoint.
467  */
468 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
469 {
470 	siginfo_t info;
471 
472 	ptrace_cancel_bpt(tsk);
473 
474 	info.si_signo = SIGTRAP;
475 	info.si_errno = 0;
476 	info.si_code  = TRAP_BRKPT;
477 	info.si_addr  = (void __user *)instruction_pointer(regs);
478 
479 	force_sig_info(SIGTRAP, &info, tsk);
480 }
481 
482 static int break_trap(struct pt_regs *regs, unsigned int instr)
483 {
484 	ptrace_break(current, regs);
485 	return 0;
486 }
487 
488 static struct undef_hook arm_break_hook = {
489 	.instr_mask	= 0x0fffffff,
490 	.instr_val	= 0x07f001f0,
491 	.cpsr_mask	= PSR_T_BIT,
492 	.cpsr_val	= 0,
493 	.fn		= break_trap,
494 };
495 
496 static struct undef_hook thumb_break_hook = {
497 	.instr_mask	= 0xffff,
498 	.instr_val	= 0xde01,
499 	.cpsr_mask	= PSR_T_BIT,
500 	.cpsr_val	= PSR_T_BIT,
501 	.fn		= break_trap,
502 };
503 
504 static int __init ptrace_break_init(void)
505 {
506 	register_undef_hook(&arm_break_hook);
507 	register_undef_hook(&thumb_break_hook);
508 	return 0;
509 }
510 
511 core_initcall(ptrace_break_init);
512 
513 /*
514  * Read the word at offset "off" into the "struct user".  We
515  * actually access the pt_regs stored on the kernel stack.
516  */
517 static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
518 			    unsigned long __user *ret)
519 {
520 	unsigned long tmp;
521 
522 	if (off & 3 || off >= sizeof(struct user))
523 		return -EIO;
524 
525 	tmp = 0;
526 	if (off < sizeof(struct pt_regs))
527 		tmp = get_user_reg(tsk, off >> 2);
528 
529 	return put_user(tmp, ret);
530 }
531 
532 /*
533  * Write the word at offset "off" into "struct user".  We
534  * actually access the pt_regs stored on the kernel stack.
535  */
536 static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
537 			     unsigned long val)
538 {
539 	if (off & 3 || off >= sizeof(struct user))
540 		return -EIO;
541 
542 	if (off >= sizeof(struct pt_regs))
543 		return 0;
544 
545 	return put_user_reg(tsk, off >> 2, val);
546 }
547 
548 /*
549  * Get all user integer registers.
550  */
551 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
552 {
553 	struct pt_regs *regs = task_pt_regs(tsk);
554 
555 	return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
556 }
557 
558 /*
559  * Set all user integer registers.
560  */
561 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
562 {
563 	struct pt_regs newregs;
564 	int ret;
565 
566 	ret = -EFAULT;
567 	if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
568 		struct pt_regs *regs = task_pt_regs(tsk);
569 
570 		ret = -EINVAL;
571 		if (valid_user_regs(&newregs)) {
572 			*regs = newregs;
573 			ret = 0;
574 		}
575 	}
576 
577 	return ret;
578 }
579 
580 /*
581  * Get the child FPU state.
582  */
583 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
584 {
585 	return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
586 			    sizeof(struct user_fp)) ? -EFAULT : 0;
587 }
588 
589 /*
590  * Set the child FPU state.
591  */
592 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
593 {
594 	struct thread_info *thread = task_thread_info(tsk);
595 	thread->used_cp[1] = thread->used_cp[2] = 1;
596 	return copy_from_user(&thread->fpstate, ufp,
597 			      sizeof(struct user_fp)) ? -EFAULT : 0;
598 }
599 
600 #ifdef CONFIG_IWMMXT
601 
602 /*
603  * Get the child iWMMXt state.
604  */
605 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
606 {
607 	struct thread_info *thread = task_thread_info(tsk);
608 
609 	if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
610 		return -ENODATA;
611 	iwmmxt_task_disable(thread);  /* force it to ram */
612 	return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
613 		? -EFAULT : 0;
614 }
615 
616 /*
617  * Set the child iWMMXt state.
618  */
619 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
620 {
621 	struct thread_info *thread = task_thread_info(tsk);
622 
623 	if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
624 		return -EACCES;
625 	iwmmxt_task_release(thread);  /* force a reload */
626 	return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
627 		? -EFAULT : 0;
628 }
629 
630 #endif
631 
632 #ifdef CONFIG_CRUNCH
633 /*
634  * Get the child Crunch state.
635  */
636 static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
637 {
638 	struct thread_info *thread = task_thread_info(tsk);
639 
640 	crunch_task_disable(thread);  /* force it to ram */
641 	return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
642 		? -EFAULT : 0;
643 }
644 
645 /*
646  * Set the child Crunch state.
647  */
648 static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
649 {
650 	struct thread_info *thread = task_thread_info(tsk);
651 
652 	crunch_task_release(thread);  /* force a reload */
653 	return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
654 		? -EFAULT : 0;
655 }
656 #endif
657 
658 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
659 {
660 	int ret;
661 
662 	switch (request) {
663 		/*
664 		 * read word at location "addr" in the child process.
665 		 */
666 		case PTRACE_PEEKTEXT:
667 		case PTRACE_PEEKDATA:
668 			ret = generic_ptrace_peekdata(child, addr, data);
669 			break;
670 
671 		case PTRACE_PEEKUSR:
672 			ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
673 			break;
674 
675 		/*
676 		 * write the word at location addr.
677 		 */
678 		case PTRACE_POKETEXT:
679 		case PTRACE_POKEDATA:
680 			ret = generic_ptrace_pokedata(child, addr, data);
681 			break;
682 
683 		case PTRACE_POKEUSR:
684 			ret = ptrace_write_user(child, addr, data);
685 			break;
686 
687 		/*
688 		 * continue/restart and stop at next (return from) syscall
689 		 */
690 		case PTRACE_SYSCALL:
691 		case PTRACE_CONT:
692 			ret = -EIO;
693 			if (!valid_signal(data))
694 				break;
695 			if (request == PTRACE_SYSCALL)
696 				set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
697 			else
698 				clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
699 			child->exit_code = data;
700 			single_step_disable(child);
701 			wake_up_process(child);
702 			ret = 0;
703 			break;
704 
705 		/*
706 		 * make the child exit.  Best I can do is send it a sigkill.
707 		 * perhaps it should be put in the status that it wants to
708 		 * exit.
709 		 */
710 		case PTRACE_KILL:
711 			single_step_disable(child);
712 			if (child->exit_state != EXIT_ZOMBIE) {
713 				child->exit_code = SIGKILL;
714 				wake_up_process(child);
715 			}
716 			ret = 0;
717 			break;
718 
719 		/*
720 		 * execute single instruction.
721 		 */
722 		case PTRACE_SINGLESTEP:
723 			ret = -EIO;
724 			if (!valid_signal(data))
725 				break;
726 			single_step_enable(child);
727 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
728 			child->exit_code = data;
729 			/* give it a chance to run. */
730 			wake_up_process(child);
731 			ret = 0;
732 			break;
733 
734 		case PTRACE_GETREGS:
735 			ret = ptrace_getregs(child, (void __user *)data);
736 			break;
737 
738 		case PTRACE_SETREGS:
739 			ret = ptrace_setregs(child, (void __user *)data);
740 			break;
741 
742 		case PTRACE_GETFPREGS:
743 			ret = ptrace_getfpregs(child, (void __user *)data);
744 			break;
745 
746 		case PTRACE_SETFPREGS:
747 			ret = ptrace_setfpregs(child, (void __user *)data);
748 			break;
749 
750 #ifdef CONFIG_IWMMXT
751 		case PTRACE_GETWMMXREGS:
752 			ret = ptrace_getwmmxregs(child, (void __user *)data);
753 			break;
754 
755 		case PTRACE_SETWMMXREGS:
756 			ret = ptrace_setwmmxregs(child, (void __user *)data);
757 			break;
758 #endif
759 
760 		case PTRACE_GET_THREAD_AREA:
761 			ret = put_user(task_thread_info(child)->tp_value,
762 				       (unsigned long __user *) data);
763 			break;
764 
765 		case PTRACE_SET_SYSCALL:
766 			task_thread_info(child)->syscall = data;
767 			ret = 0;
768 			break;
769 
770 #ifdef CONFIG_CRUNCH
771 		case PTRACE_GETCRUNCHREGS:
772 			ret = ptrace_getcrunchregs(child, (void __user *)data);
773 			break;
774 
775 		case PTRACE_SETCRUNCHREGS:
776 			ret = ptrace_setcrunchregs(child, (void __user *)data);
777 			break;
778 #endif
779 
780 		default:
781 			ret = ptrace_request(child, request, addr, data);
782 			break;
783 	}
784 
785 	return ret;
786 }
787 
788 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
789 {
790 	unsigned long ip;
791 
792 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
793 		return scno;
794 	if (!(current->ptrace & PT_PTRACED))
795 		return scno;
796 
797 	/*
798 	 * Save IP.  IP is used to denote syscall entry/exit:
799 	 *  IP = 0 -> entry, = 1 -> exit
800 	 */
801 	ip = regs->ARM_ip;
802 	regs->ARM_ip = why;
803 
804 	current_thread_info()->syscall = scno;
805 
806 	/* the 0x80 provides a way for the tracing parent to distinguish
807 	   between a syscall stop and SIGTRAP delivery */
808 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
809 				 ? 0x80 : 0));
810 	/*
811 	 * this isn't the same as continuing with a signal, but it will do
812 	 * for normal use.  strace only continues with a signal if the
813 	 * stopping signal is not SIGTRAP.  -brl
814 	 */
815 	if (current->exit_code) {
816 		send_sig(current->exit_code, current, 1);
817 		current->exit_code = 0;
818 	}
819 	regs->ARM_ip = ip;
820 
821 	return current_thread_info()->syscall;
822 }
823