1 /* 2 * linux/arch/arm/kernel/ptrace.c 3 * 4 * By Ross Biro 1/23/92 5 * edited by Linus Torvalds 6 * ARM modifications Copyright (C) 2000 Russell King 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 #include <linux/kernel.h> 13 #include <linux/sched.h> 14 #include <linux/mm.h> 15 #include <linux/smp.h> 16 #include <linux/ptrace.h> 17 #include <linux/user.h> 18 #include <linux/security.h> 19 #include <linux/init.h> 20 #include <linux/signal.h> 21 #include <linux/uaccess.h> 22 23 #include <asm/pgtable.h> 24 #include <asm/system.h> 25 #include <asm/traps.h> 26 27 #include "ptrace.h" 28 29 #define REG_PC 15 30 #define REG_PSR 16 31 /* 32 * does not yet catch signals sent when the child dies. 33 * in exit.c or in signal.c. 34 */ 35 36 #if 0 37 /* 38 * Breakpoint SWI instruction: SWI &9F0001 39 */ 40 #define BREAKINST_ARM 0xef9f0001 41 #define BREAKINST_THUMB 0xdf00 /* fill this in later */ 42 #else 43 /* 44 * New breakpoints - use an undefined instruction. The ARM architecture 45 * reference manual guarantees that the following instruction space 46 * will produce an undefined instruction exception on all CPUs: 47 * 48 * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx 49 * Thumb: 1101 1110 xxxx xxxx 50 */ 51 #define BREAKINST_ARM 0xe7f001f0 52 #define BREAKINST_THUMB 0xde01 53 #endif 54 55 /* 56 * this routine will get a word off of the processes privileged stack. 57 * the offset is how far from the base addr as stored in the THREAD. 58 * this routine assumes that all the privileged stacks are in our 59 * data space. 60 */ 61 static inline long get_user_reg(struct task_struct *task, int offset) 62 { 63 return task_pt_regs(task)->uregs[offset]; 64 } 65 66 /* 67 * this routine will put a word on the processes privileged stack. 68 * the offset is how far from the base addr as stored in the THREAD. 69 * this routine assumes that all the privileged stacks are in our 70 * data space. 71 */ 72 static inline int 73 put_user_reg(struct task_struct *task, int offset, long data) 74 { 75 struct pt_regs newregs, *regs = task_pt_regs(task); 76 int ret = -EINVAL; 77 78 newregs = *regs; 79 newregs.uregs[offset] = data; 80 81 if (valid_user_regs(&newregs)) { 82 regs->uregs[offset] = data; 83 ret = 0; 84 } 85 86 return ret; 87 } 88 89 static inline int 90 read_u32(struct task_struct *task, unsigned long addr, u32 *res) 91 { 92 int ret; 93 94 ret = access_process_vm(task, addr, res, sizeof(*res), 0); 95 96 return ret == sizeof(*res) ? 0 : -EIO; 97 } 98 99 static inline int 100 read_instr(struct task_struct *task, unsigned long addr, u32 *res) 101 { 102 int ret; 103 104 if (addr & 1) { 105 u16 val; 106 ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0); 107 ret = ret == sizeof(val) ? 0 : -EIO; 108 *res = val; 109 } else { 110 u32 val; 111 ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0); 112 ret = ret == sizeof(val) ? 0 : -EIO; 113 *res = val; 114 } 115 return ret; 116 } 117 118 /* 119 * Get value of register `rn' (in the instruction) 120 */ 121 static unsigned long 122 ptrace_getrn(struct task_struct *child, unsigned long insn) 123 { 124 unsigned int reg = (insn >> 16) & 15; 125 unsigned long val; 126 127 val = get_user_reg(child, reg); 128 if (reg == 15) 129 val += 8; 130 131 return val; 132 } 133 134 /* 135 * Get value of operand 2 (in an ALU instruction) 136 */ 137 static unsigned long 138 ptrace_getaluop2(struct task_struct *child, unsigned long insn) 139 { 140 unsigned long val; 141 int shift; 142 int type; 143 144 if (insn & 1 << 25) { 145 val = insn & 255; 146 shift = (insn >> 8) & 15; 147 type = 3; 148 } else { 149 val = get_user_reg (child, insn & 15); 150 151 if (insn & (1 << 4)) 152 shift = (int)get_user_reg (child, (insn >> 8) & 15); 153 else 154 shift = (insn >> 7) & 31; 155 156 type = (insn >> 5) & 3; 157 } 158 159 switch (type) { 160 case 0: val <<= shift; break; 161 case 1: val >>= shift; break; 162 case 2: 163 val = (((signed long)val) >> shift); 164 break; 165 case 3: 166 val = (val >> shift) | (val << (32 - shift)); 167 break; 168 } 169 return val; 170 } 171 172 /* 173 * Get value of operand 2 (in a LDR instruction) 174 */ 175 static unsigned long 176 ptrace_getldrop2(struct task_struct *child, unsigned long insn) 177 { 178 unsigned long val; 179 int shift; 180 int type; 181 182 val = get_user_reg(child, insn & 15); 183 shift = (insn >> 7) & 31; 184 type = (insn >> 5) & 3; 185 186 switch (type) { 187 case 0: val <<= shift; break; 188 case 1: val >>= shift; break; 189 case 2: 190 val = (((signed long)val) >> shift); 191 break; 192 case 3: 193 val = (val >> shift) | (val << (32 - shift)); 194 break; 195 } 196 return val; 197 } 198 199 #define OP_MASK 0x01e00000 200 #define OP_AND 0x00000000 201 #define OP_EOR 0x00200000 202 #define OP_SUB 0x00400000 203 #define OP_RSB 0x00600000 204 #define OP_ADD 0x00800000 205 #define OP_ADC 0x00a00000 206 #define OP_SBC 0x00c00000 207 #define OP_RSC 0x00e00000 208 #define OP_ORR 0x01800000 209 #define OP_MOV 0x01a00000 210 #define OP_BIC 0x01c00000 211 #define OP_MVN 0x01e00000 212 213 static unsigned long 214 get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn) 215 { 216 u32 alt = 0; 217 218 switch (insn & 0x0e000000) { 219 case 0x00000000: 220 case 0x02000000: { 221 /* 222 * data processing 223 */ 224 long aluop1, aluop2, ccbit; 225 226 if ((insn & 0x0fffffd0) == 0x012fff10) { 227 /* 228 * bx or blx 229 */ 230 alt = get_user_reg(child, insn & 15); 231 break; 232 } 233 234 235 if ((insn & 0xf000) != 0xf000) 236 break; 237 238 aluop1 = ptrace_getrn(child, insn); 239 aluop2 = ptrace_getaluop2(child, insn); 240 ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0; 241 242 switch (insn & OP_MASK) { 243 case OP_AND: alt = aluop1 & aluop2; break; 244 case OP_EOR: alt = aluop1 ^ aluop2; break; 245 case OP_SUB: alt = aluop1 - aluop2; break; 246 case OP_RSB: alt = aluop2 - aluop1; break; 247 case OP_ADD: alt = aluop1 + aluop2; break; 248 case OP_ADC: alt = aluop1 + aluop2 + ccbit; break; 249 case OP_SBC: alt = aluop1 - aluop2 + ccbit; break; 250 case OP_RSC: alt = aluop2 - aluop1 + ccbit; break; 251 case OP_ORR: alt = aluop1 | aluop2; break; 252 case OP_MOV: alt = aluop2; break; 253 case OP_BIC: alt = aluop1 & ~aluop2; break; 254 case OP_MVN: alt = ~aluop2; break; 255 } 256 break; 257 } 258 259 case 0x04000000: 260 case 0x06000000: 261 /* 262 * ldr 263 */ 264 if ((insn & 0x0010f000) == 0x0010f000) { 265 unsigned long base; 266 267 base = ptrace_getrn(child, insn); 268 if (insn & 1 << 24) { 269 long aluop2; 270 271 if (insn & 0x02000000) 272 aluop2 = ptrace_getldrop2(child, insn); 273 else 274 aluop2 = insn & 0xfff; 275 276 if (insn & 1 << 23) 277 base += aluop2; 278 else 279 base -= aluop2; 280 } 281 read_u32(child, base, &alt); 282 } 283 break; 284 285 case 0x08000000: 286 /* 287 * ldm 288 */ 289 if ((insn & 0x00108000) == 0x00108000) { 290 unsigned long base; 291 unsigned int nr_regs; 292 293 if (insn & (1 << 23)) { 294 nr_regs = hweight16(insn & 65535) << 2; 295 296 if (!(insn & (1 << 24))) 297 nr_regs -= 4; 298 } else { 299 if (insn & (1 << 24)) 300 nr_regs = -4; 301 else 302 nr_regs = 0; 303 } 304 305 base = ptrace_getrn(child, insn); 306 307 read_u32(child, base + nr_regs, &alt); 308 break; 309 } 310 break; 311 312 case 0x0a000000: { 313 /* 314 * bl or b 315 */ 316 signed long displ; 317 /* It's a branch/branch link: instead of trying to 318 * figure out whether the branch will be taken or not, 319 * we'll put a breakpoint at both locations. This is 320 * simpler, more reliable, and probably not a whole lot 321 * slower than the alternative approach of emulating the 322 * branch. 323 */ 324 displ = (insn & 0x00ffffff) << 8; 325 displ = (displ >> 6) + 8; 326 if (displ != 0 && displ != 4) 327 alt = pc + displ; 328 } 329 break; 330 } 331 332 return alt; 333 } 334 335 static int 336 swap_insn(struct task_struct *task, unsigned long addr, 337 void *old_insn, void *new_insn, int size) 338 { 339 int ret; 340 341 ret = access_process_vm(task, addr, old_insn, size, 0); 342 if (ret == size) 343 ret = access_process_vm(task, addr, new_insn, size, 1); 344 return ret; 345 } 346 347 static void 348 add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr) 349 { 350 int nr = dbg->nsaved; 351 352 if (nr < 2) { 353 u32 new_insn = BREAKINST_ARM; 354 int res; 355 356 res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4); 357 358 if (res == 4) { 359 dbg->bp[nr].address = addr; 360 dbg->nsaved += 1; 361 } 362 } else 363 printk(KERN_ERR "ptrace: too many breakpoints\n"); 364 } 365 366 /* 367 * Clear one breakpoint in the user program. We copy what the hardware 368 * does and use bit 0 of the address to indicate whether this is a Thumb 369 * breakpoint or an ARM breakpoint. 370 */ 371 static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp) 372 { 373 unsigned long addr = bp->address; 374 union debug_insn old_insn; 375 int ret; 376 377 if (addr & 1) { 378 ret = swap_insn(task, addr & ~1, &old_insn.thumb, 379 &bp->insn.thumb, 2); 380 381 if (ret != 2 || old_insn.thumb != BREAKINST_THUMB) 382 printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at " 383 "0x%08lx (0x%04x)\n", task->comm, 384 task_pid_nr(task), addr, old_insn.thumb); 385 } else { 386 ret = swap_insn(task, addr & ~3, &old_insn.arm, 387 &bp->insn.arm, 4); 388 389 if (ret != 4 || old_insn.arm != BREAKINST_ARM) 390 printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at " 391 "0x%08lx (0x%08x)\n", task->comm, 392 task_pid_nr(task), addr, old_insn.arm); 393 } 394 } 395 396 void ptrace_set_bpt(struct task_struct *child) 397 { 398 struct pt_regs *regs; 399 unsigned long pc; 400 u32 insn; 401 int res; 402 403 regs = task_pt_regs(child); 404 pc = instruction_pointer(regs); 405 406 if (thumb_mode(regs)) { 407 printk(KERN_WARNING "ptrace: can't handle thumb mode\n"); 408 return; 409 } 410 411 res = read_instr(child, pc, &insn); 412 if (!res) { 413 struct debug_info *dbg = &child->thread.debug; 414 unsigned long alt; 415 416 dbg->nsaved = 0; 417 418 alt = get_branch_address(child, pc, insn); 419 if (alt) 420 add_breakpoint(child, dbg, alt); 421 422 /* 423 * Note that we ignore the result of setting the above 424 * breakpoint since it may fail. When it does, this is 425 * not so much an error, but a forewarning that we may 426 * be receiving a prefetch abort shortly. 427 * 428 * If we don't set this breakpoint here, then we can 429 * lose control of the thread during single stepping. 430 */ 431 if (!alt || predicate(insn) != PREDICATE_ALWAYS) 432 add_breakpoint(child, dbg, pc + 4); 433 } 434 } 435 436 /* 437 * Ensure no single-step breakpoint is pending. Returns non-zero 438 * value if child was being single-stepped. 439 */ 440 void ptrace_cancel_bpt(struct task_struct *child) 441 { 442 int i, nsaved = child->thread.debug.nsaved; 443 444 child->thread.debug.nsaved = 0; 445 446 if (nsaved > 2) { 447 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); 448 nsaved = 2; 449 } 450 451 for (i = 0; i < nsaved; i++) 452 clear_breakpoint(child, &child->thread.debug.bp[i]); 453 } 454 455 /* 456 * Called by kernel/ptrace.c when detaching.. 457 */ 458 void ptrace_disable(struct task_struct *child) 459 { 460 single_step_disable(child); 461 } 462 463 /* 464 * Handle hitting a breakpoint. 465 */ 466 void ptrace_break(struct task_struct *tsk, struct pt_regs *regs) 467 { 468 siginfo_t info; 469 470 ptrace_cancel_bpt(tsk); 471 472 info.si_signo = SIGTRAP; 473 info.si_errno = 0; 474 info.si_code = TRAP_BRKPT; 475 info.si_addr = (void __user *)instruction_pointer(regs); 476 477 force_sig_info(SIGTRAP, &info, tsk); 478 } 479 480 static int break_trap(struct pt_regs *regs, unsigned int instr) 481 { 482 ptrace_break(current, regs); 483 return 0; 484 } 485 486 static struct undef_hook arm_break_hook = { 487 .instr_mask = 0x0fffffff, 488 .instr_val = 0x07f001f0, 489 .cpsr_mask = PSR_T_BIT, 490 .cpsr_val = 0, 491 .fn = break_trap, 492 }; 493 494 static struct undef_hook thumb_break_hook = { 495 .instr_mask = 0xffff, 496 .instr_val = 0xde01, 497 .cpsr_mask = PSR_T_BIT, 498 .cpsr_val = PSR_T_BIT, 499 .fn = break_trap, 500 }; 501 502 static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr) 503 { 504 unsigned int instr2; 505 void __user *pc; 506 507 /* Check the second half of the instruction. */ 508 pc = (void __user *)(instruction_pointer(regs) + 2); 509 510 if (processor_mode(regs) == SVC_MODE) { 511 instr2 = *(u16 *) pc; 512 } else { 513 get_user(instr2, (u16 __user *)pc); 514 } 515 516 if (instr2 == 0xa000) { 517 ptrace_break(current, regs); 518 return 0; 519 } else { 520 return 1; 521 } 522 } 523 524 static struct undef_hook thumb2_break_hook = { 525 .instr_mask = 0xffff, 526 .instr_val = 0xf7f0, 527 .cpsr_mask = PSR_T_BIT, 528 .cpsr_val = PSR_T_BIT, 529 .fn = thumb2_break_trap, 530 }; 531 532 static int __init ptrace_break_init(void) 533 { 534 register_undef_hook(&arm_break_hook); 535 register_undef_hook(&thumb_break_hook); 536 register_undef_hook(&thumb2_break_hook); 537 return 0; 538 } 539 540 core_initcall(ptrace_break_init); 541 542 /* 543 * Read the word at offset "off" into the "struct user". We 544 * actually access the pt_regs stored on the kernel stack. 545 */ 546 static int ptrace_read_user(struct task_struct *tsk, unsigned long off, 547 unsigned long __user *ret) 548 { 549 unsigned long tmp; 550 551 if (off & 3 || off >= sizeof(struct user)) 552 return -EIO; 553 554 tmp = 0; 555 if (off == PT_TEXT_ADDR) 556 tmp = tsk->mm->start_code; 557 else if (off == PT_DATA_ADDR) 558 tmp = tsk->mm->start_data; 559 else if (off == PT_TEXT_END_ADDR) 560 tmp = tsk->mm->end_code; 561 else if (off < sizeof(struct pt_regs)) 562 tmp = get_user_reg(tsk, off >> 2); 563 564 return put_user(tmp, ret); 565 } 566 567 /* 568 * Write the word at offset "off" into "struct user". We 569 * actually access the pt_regs stored on the kernel stack. 570 */ 571 static int ptrace_write_user(struct task_struct *tsk, unsigned long off, 572 unsigned long val) 573 { 574 if (off & 3 || off >= sizeof(struct user)) 575 return -EIO; 576 577 if (off >= sizeof(struct pt_regs)) 578 return 0; 579 580 return put_user_reg(tsk, off >> 2, val); 581 } 582 583 /* 584 * Get all user integer registers. 585 */ 586 static int ptrace_getregs(struct task_struct *tsk, void __user *uregs) 587 { 588 struct pt_regs *regs = task_pt_regs(tsk); 589 590 return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0; 591 } 592 593 /* 594 * Set all user integer registers. 595 */ 596 static int ptrace_setregs(struct task_struct *tsk, void __user *uregs) 597 { 598 struct pt_regs newregs; 599 int ret; 600 601 ret = -EFAULT; 602 if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) { 603 struct pt_regs *regs = task_pt_regs(tsk); 604 605 ret = -EINVAL; 606 if (valid_user_regs(&newregs)) { 607 *regs = newregs; 608 ret = 0; 609 } 610 } 611 612 return ret; 613 } 614 615 /* 616 * Get the child FPU state. 617 */ 618 static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp) 619 { 620 return copy_to_user(ufp, &task_thread_info(tsk)->fpstate, 621 sizeof(struct user_fp)) ? -EFAULT : 0; 622 } 623 624 /* 625 * Set the child FPU state. 626 */ 627 static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp) 628 { 629 struct thread_info *thread = task_thread_info(tsk); 630 thread->used_cp[1] = thread->used_cp[2] = 1; 631 return copy_from_user(&thread->fpstate, ufp, 632 sizeof(struct user_fp)) ? -EFAULT : 0; 633 } 634 635 #ifdef CONFIG_IWMMXT 636 637 /* 638 * Get the child iWMMXt state. 639 */ 640 static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp) 641 { 642 struct thread_info *thread = task_thread_info(tsk); 643 644 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT)) 645 return -ENODATA; 646 iwmmxt_task_disable(thread); /* force it to ram */ 647 return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE) 648 ? -EFAULT : 0; 649 } 650 651 /* 652 * Set the child iWMMXt state. 653 */ 654 static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp) 655 { 656 struct thread_info *thread = task_thread_info(tsk); 657 658 if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT)) 659 return -EACCES; 660 iwmmxt_task_release(thread); /* force a reload */ 661 return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE) 662 ? -EFAULT : 0; 663 } 664 665 #endif 666 667 #ifdef CONFIG_CRUNCH 668 /* 669 * Get the child Crunch state. 670 */ 671 static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp) 672 { 673 struct thread_info *thread = task_thread_info(tsk); 674 675 crunch_task_disable(thread); /* force it to ram */ 676 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE) 677 ? -EFAULT : 0; 678 } 679 680 /* 681 * Set the child Crunch state. 682 */ 683 static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) 684 { 685 struct thread_info *thread = task_thread_info(tsk); 686 687 crunch_task_release(thread); /* force a reload */ 688 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE) 689 ? -EFAULT : 0; 690 } 691 #endif 692 693 #ifdef CONFIG_VFP 694 /* 695 * Get the child VFP state. 696 */ 697 static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data) 698 { 699 struct thread_info *thread = task_thread_info(tsk); 700 union vfp_state *vfp = &thread->vfpstate; 701 struct user_vfp __user *ufp = data; 702 703 vfp_sync_hwstate(thread); 704 705 /* copy the floating point registers */ 706 if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs, 707 sizeof(vfp->hard.fpregs))) 708 return -EFAULT; 709 710 /* copy the status and control register */ 711 if (put_user(vfp->hard.fpscr, &ufp->fpscr)) 712 return -EFAULT; 713 714 return 0; 715 } 716 717 /* 718 * Set the child VFP state. 719 */ 720 static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) 721 { 722 struct thread_info *thread = task_thread_info(tsk); 723 union vfp_state *vfp = &thread->vfpstate; 724 struct user_vfp __user *ufp = data; 725 726 vfp_sync_hwstate(thread); 727 728 /* copy the floating point registers */ 729 if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs, 730 sizeof(vfp->hard.fpregs))) 731 return -EFAULT; 732 733 /* copy the status and control register */ 734 if (get_user(vfp->hard.fpscr, &ufp->fpscr)) 735 return -EFAULT; 736 737 vfp_flush_hwstate(thread); 738 739 return 0; 740 } 741 #endif 742 743 long arch_ptrace(struct task_struct *child, long request, long addr, long data) 744 { 745 int ret; 746 747 switch (request) { 748 case PTRACE_PEEKUSR: 749 ret = ptrace_read_user(child, addr, (unsigned long __user *)data); 750 break; 751 752 case PTRACE_POKEUSR: 753 ret = ptrace_write_user(child, addr, data); 754 break; 755 756 /* 757 * continue/restart and stop at next (return from) syscall 758 */ 759 case PTRACE_SYSCALL: 760 case PTRACE_CONT: 761 ret = -EIO; 762 if (!valid_signal(data)) 763 break; 764 if (request == PTRACE_SYSCALL) 765 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 766 else 767 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 768 child->exit_code = data; 769 single_step_disable(child); 770 wake_up_process(child); 771 ret = 0; 772 break; 773 774 /* 775 * make the child exit. Best I can do is send it a sigkill. 776 * perhaps it should be put in the status that it wants to 777 * exit. 778 */ 779 case PTRACE_KILL: 780 single_step_disable(child); 781 if (child->exit_state != EXIT_ZOMBIE) { 782 child->exit_code = SIGKILL; 783 wake_up_process(child); 784 } 785 ret = 0; 786 break; 787 788 /* 789 * execute single instruction. 790 */ 791 case PTRACE_SINGLESTEP: 792 ret = -EIO; 793 if (!valid_signal(data)) 794 break; 795 single_step_enable(child); 796 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); 797 child->exit_code = data; 798 /* give it a chance to run. */ 799 wake_up_process(child); 800 ret = 0; 801 break; 802 803 case PTRACE_GETREGS: 804 ret = ptrace_getregs(child, (void __user *)data); 805 break; 806 807 case PTRACE_SETREGS: 808 ret = ptrace_setregs(child, (void __user *)data); 809 break; 810 811 case PTRACE_GETFPREGS: 812 ret = ptrace_getfpregs(child, (void __user *)data); 813 break; 814 815 case PTRACE_SETFPREGS: 816 ret = ptrace_setfpregs(child, (void __user *)data); 817 break; 818 819 #ifdef CONFIG_IWMMXT 820 case PTRACE_GETWMMXREGS: 821 ret = ptrace_getwmmxregs(child, (void __user *)data); 822 break; 823 824 case PTRACE_SETWMMXREGS: 825 ret = ptrace_setwmmxregs(child, (void __user *)data); 826 break; 827 #endif 828 829 case PTRACE_GET_THREAD_AREA: 830 ret = put_user(task_thread_info(child)->tp_value, 831 (unsigned long __user *) data); 832 break; 833 834 case PTRACE_SET_SYSCALL: 835 task_thread_info(child)->syscall = data; 836 ret = 0; 837 break; 838 839 #ifdef CONFIG_CRUNCH 840 case PTRACE_GETCRUNCHREGS: 841 ret = ptrace_getcrunchregs(child, (void __user *)data); 842 break; 843 844 case PTRACE_SETCRUNCHREGS: 845 ret = ptrace_setcrunchregs(child, (void __user *)data); 846 break; 847 #endif 848 849 #ifdef CONFIG_VFP 850 case PTRACE_GETVFPREGS: 851 ret = ptrace_getvfpregs(child, (void __user *)data); 852 break; 853 854 case PTRACE_SETVFPREGS: 855 ret = ptrace_setvfpregs(child, (void __user *)data); 856 break; 857 #endif 858 859 default: 860 ret = ptrace_request(child, request, addr, data); 861 break; 862 } 863 864 return ret; 865 } 866 867 asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) 868 { 869 unsigned long ip; 870 871 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 872 return scno; 873 if (!(current->ptrace & PT_PTRACED)) 874 return scno; 875 876 /* 877 * Save IP. IP is used to denote syscall entry/exit: 878 * IP = 0 -> entry, = 1 -> exit 879 */ 880 ip = regs->ARM_ip; 881 regs->ARM_ip = why; 882 883 current_thread_info()->syscall = scno; 884 885 /* the 0x80 provides a way for the tracing parent to distinguish 886 between a syscall stop and SIGTRAP delivery */ 887 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 888 ? 0x80 : 0)); 889 /* 890 * this isn't the same as continuing with a signal, but it will do 891 * for normal use. strace only continues with a signal if the 892 * stopping signal is not SIGTRAP. -brl 893 */ 894 if (current->exit_code) { 895 send_sig(current->exit_code, current, 1); 896 current->exit_code = 0; 897 } 898 regs->ARM_ip = ip; 899 900 return current_thread_info()->syscall; 901 } 902