1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/arch/arm/kernel/module.c 4 * 5 * Copyright (C) 2002 Russell King. 6 * Modified for nommu by Hyok S. Choi 7 * 8 * Module allocation method suggested by Andi Kleen. 9 */ 10 #include <linux/module.h> 11 #include <linux/moduleloader.h> 12 #include <linux/kernel.h> 13 #include <linux/mm.h> 14 #include <linux/elf.h> 15 #include <linux/vmalloc.h> 16 #include <linux/fs.h> 17 #include <linux/string.h> 18 #include <linux/gfp.h> 19 20 #include <asm/sections.h> 21 #include <asm/smp_plat.h> 22 #include <asm/unwind.h> 23 #include <asm/opcodes.h> 24 25 #ifdef CONFIG_XIP_KERNEL 26 /* 27 * The XIP kernel text is mapped in the module area for modules and 28 * some other stuff to work without any indirect relocations. 29 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid 30 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. 31 */ 32 #undef MODULES_VADDR 33 #define MODULES_VADDR (((unsigned long)_exiprom + ~PMD_MASK) & PMD_MASK) 34 #endif 35 36 #ifdef CONFIG_MMU 37 void *module_alloc(unsigned long size) 38 { 39 gfp_t gfp_mask = GFP_KERNEL; 40 void *p; 41 42 /* Silence the initial allocation */ 43 if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS)) 44 gfp_mask |= __GFP_NOWARN; 45 46 p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END, 47 gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, 48 __builtin_return_address(0)); 49 if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p) 50 return p; 51 return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END, 52 GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE, 53 __builtin_return_address(0)); 54 } 55 #endif 56 57 bool module_init_section(const char *name) 58 { 59 return strstarts(name, ".init") || 60 strstarts(name, ".ARM.extab.init") || 61 strstarts(name, ".ARM.exidx.init"); 62 } 63 64 bool module_exit_section(const char *name) 65 { 66 return strstarts(name, ".exit") || 67 strstarts(name, ".ARM.extab.exit") || 68 strstarts(name, ".ARM.exidx.exit"); 69 } 70 71 int 72 apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, 73 unsigned int relindex, struct module *module) 74 { 75 Elf32_Shdr *symsec = sechdrs + symindex; 76 Elf32_Shdr *relsec = sechdrs + relindex; 77 Elf32_Shdr *dstsec = sechdrs + relsec->sh_info; 78 Elf32_Rel *rel = (void *)relsec->sh_addr; 79 unsigned int i; 80 81 for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) { 82 unsigned long loc; 83 Elf32_Sym *sym; 84 const char *symname; 85 s32 offset; 86 u32 tmp; 87 #ifdef CONFIG_THUMB2_KERNEL 88 u32 upper, lower, sign, j1, j2; 89 #endif 90 91 offset = ELF32_R_SYM(rel->r_info); 92 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { 93 pr_err("%s: section %u reloc %u: bad relocation sym offset\n", 94 module->name, relindex, i); 95 return -ENOEXEC; 96 } 97 98 sym = ((Elf32_Sym *)symsec->sh_addr) + offset; 99 symname = strtab + sym->st_name; 100 101 if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) { 102 pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n", 103 module->name, relindex, i, symname, 104 rel->r_offset, dstsec->sh_size); 105 return -ENOEXEC; 106 } 107 108 loc = dstsec->sh_addr + rel->r_offset; 109 110 switch (ELF32_R_TYPE(rel->r_info)) { 111 case R_ARM_NONE: 112 /* ignore */ 113 break; 114 115 case R_ARM_ABS32: 116 case R_ARM_TARGET1: 117 *(u32 *)loc += sym->st_value; 118 break; 119 120 case R_ARM_PC24: 121 case R_ARM_CALL: 122 case R_ARM_JUMP24: 123 if (sym->st_value & 3) { 124 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n", 125 module->name, relindex, i, symname); 126 return -ENOEXEC; 127 } 128 129 offset = __mem_to_opcode_arm(*(u32 *)loc); 130 offset = (offset & 0x00ffffff) << 2; 131 if (offset & 0x02000000) 132 offset -= 0x04000000; 133 134 offset += sym->st_value - loc; 135 136 /* 137 * Route through a PLT entry if 'offset' exceeds the 138 * supported range. Note that 'offset + loc + 8' 139 * contains the absolute jump target, i.e., 140 * @sym + addend, corrected for the +8 PC bias. 141 */ 142 if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) && 143 (offset <= (s32)0xfe000000 || 144 offset >= (s32)0x02000000)) 145 offset = get_module_plt(module, loc, 146 offset + loc + 8) 147 - loc - 8; 148 149 if (offset <= (s32)0xfe000000 || 150 offset >= (s32)0x02000000) { 151 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", 152 module->name, relindex, i, symname, 153 ELF32_R_TYPE(rel->r_info), loc, 154 sym->st_value); 155 return -ENOEXEC; 156 } 157 158 offset >>= 2; 159 offset &= 0x00ffffff; 160 161 *(u32 *)loc &= __opcode_to_mem_arm(0xff000000); 162 *(u32 *)loc |= __opcode_to_mem_arm(offset); 163 break; 164 165 case R_ARM_V4BX: 166 /* Preserve Rm and the condition code. Alter 167 * other bits to re-code instruction as 168 * MOV PC,Rm. 169 */ 170 *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f); 171 *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000); 172 break; 173 174 case R_ARM_PREL31: 175 offset = (*(s32 *)loc << 1) >> 1; /* sign extend */ 176 offset += sym->st_value - loc; 177 if (offset >= 0x40000000 || offset < -0x40000000) { 178 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", 179 module->name, relindex, i, symname, 180 ELF32_R_TYPE(rel->r_info), loc, 181 sym->st_value); 182 return -ENOEXEC; 183 } 184 *(u32 *)loc &= 0x80000000; 185 *(u32 *)loc |= offset & 0x7fffffff; 186 break; 187 188 case R_ARM_REL32: 189 *(u32 *)loc += sym->st_value - loc; 190 break; 191 192 case R_ARM_MOVW_ABS_NC: 193 case R_ARM_MOVT_ABS: 194 case R_ARM_MOVW_PREL_NC: 195 case R_ARM_MOVT_PREL: 196 offset = tmp = __mem_to_opcode_arm(*(u32 *)loc); 197 offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); 198 offset = (offset ^ 0x8000) - 0x8000; 199 200 offset += sym->st_value; 201 if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL || 202 ELF32_R_TYPE(rel->r_info) == R_ARM_MOVW_PREL_NC) 203 offset -= loc; 204 if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS || 205 ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL) 206 offset >>= 16; 207 208 tmp &= 0xfff0f000; 209 tmp |= ((offset & 0xf000) << 4) | 210 (offset & 0x0fff); 211 212 *(u32 *)loc = __opcode_to_mem_arm(tmp); 213 break; 214 215 #ifdef CONFIG_THUMB2_KERNEL 216 case R_ARM_THM_CALL: 217 case R_ARM_THM_JUMP24: 218 /* 219 * For function symbols, only Thumb addresses are 220 * allowed (no interworking). 221 * 222 * For non-function symbols, the destination 223 * has no specific ARM/Thumb disposition, so 224 * the branch is resolved under the assumption 225 * that interworking is not required. 226 */ 227 if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC && 228 !(sym->st_value & 1)) { 229 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n", 230 module->name, relindex, i, symname); 231 return -ENOEXEC; 232 } 233 234 upper = __mem_to_opcode_thumb16(*(u16 *)loc); 235 lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); 236 237 /* 238 * 25 bit signed address range (Thumb-2 BL and B.W 239 * instructions): 240 * S:I1:I2:imm10:imm11:0 241 * where: 242 * S = upper[10] = offset[24] 243 * I1 = ~(J1 ^ S) = offset[23] 244 * I2 = ~(J2 ^ S) = offset[22] 245 * imm10 = upper[9:0] = offset[21:12] 246 * imm11 = lower[10:0] = offset[11:1] 247 * J1 = lower[13] 248 * J2 = lower[11] 249 */ 250 sign = (upper >> 10) & 1; 251 j1 = (lower >> 13) & 1; 252 j2 = (lower >> 11) & 1; 253 offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) | 254 ((~(j2 ^ sign) & 1) << 22) | 255 ((upper & 0x03ff) << 12) | 256 ((lower & 0x07ff) << 1); 257 if (offset & 0x01000000) 258 offset -= 0x02000000; 259 offset += sym->st_value - loc; 260 261 /* 262 * Route through a PLT entry if 'offset' exceeds the 263 * supported range. 264 */ 265 if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) && 266 (offset <= (s32)0xff000000 || 267 offset >= (s32)0x01000000)) 268 offset = get_module_plt(module, loc, 269 offset + loc + 4) 270 - loc - 4; 271 272 if (offset <= (s32)0xff000000 || 273 offset >= (s32)0x01000000) { 274 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", 275 module->name, relindex, i, symname, 276 ELF32_R_TYPE(rel->r_info), loc, 277 sym->st_value); 278 return -ENOEXEC; 279 } 280 281 sign = (offset >> 24) & 1; 282 j1 = sign ^ (~(offset >> 23) & 1); 283 j2 = sign ^ (~(offset >> 22) & 1); 284 upper = (u16)((upper & 0xf800) | (sign << 10) | 285 ((offset >> 12) & 0x03ff)); 286 lower = (u16)((lower & 0xd000) | 287 (j1 << 13) | (j2 << 11) | 288 ((offset >> 1) & 0x07ff)); 289 290 *(u16 *)loc = __opcode_to_mem_thumb16(upper); 291 *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); 292 break; 293 294 case R_ARM_THM_MOVW_ABS_NC: 295 case R_ARM_THM_MOVT_ABS: 296 case R_ARM_THM_MOVW_PREL_NC: 297 case R_ARM_THM_MOVT_PREL: 298 upper = __mem_to_opcode_thumb16(*(u16 *)loc); 299 lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); 300 301 /* 302 * MOVT/MOVW instructions encoding in Thumb-2: 303 * 304 * i = upper[10] 305 * imm4 = upper[3:0] 306 * imm3 = lower[14:12] 307 * imm8 = lower[7:0] 308 * 309 * imm16 = imm4:i:imm3:imm8 310 */ 311 offset = ((upper & 0x000f) << 12) | 312 ((upper & 0x0400) << 1) | 313 ((lower & 0x7000) >> 4) | (lower & 0x00ff); 314 offset = (offset ^ 0x8000) - 0x8000; 315 offset += sym->st_value; 316 317 if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL || 318 ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVW_PREL_NC) 319 offset -= loc; 320 if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS || 321 ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL) 322 offset >>= 16; 323 324 upper = (u16)((upper & 0xfbf0) | 325 ((offset & 0xf000) >> 12) | 326 ((offset & 0x0800) >> 1)); 327 lower = (u16)((lower & 0x8f00) | 328 ((offset & 0x0700) << 4) | 329 (offset & 0x00ff)); 330 *(u16 *)loc = __opcode_to_mem_thumb16(upper); 331 *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); 332 break; 333 #endif 334 335 default: 336 pr_err("%s: unknown relocation: %u\n", 337 module->name, ELF32_R_TYPE(rel->r_info)); 338 return -ENOEXEC; 339 } 340 } 341 return 0; 342 } 343 344 struct mod_unwind_map { 345 const Elf_Shdr *unw_sec; 346 const Elf_Shdr *txt_sec; 347 }; 348 349 static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr, 350 const Elf_Shdr *sechdrs, const char *name) 351 { 352 const Elf_Shdr *s, *se; 353 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; 354 355 for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) 356 if (strcmp(name, secstrs + s->sh_name) == 0) 357 return s; 358 359 return NULL; 360 } 361 362 extern void fixup_pv_table(const void *, unsigned long); 363 extern void fixup_smp(const void *, unsigned long); 364 365 int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, 366 struct module *mod) 367 { 368 const Elf_Shdr *s = NULL; 369 #ifdef CONFIG_ARM_UNWIND 370 const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; 371 const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum; 372 struct mod_unwind_map maps[ARM_SEC_MAX]; 373 int i; 374 375 memset(maps, 0, sizeof(maps)); 376 377 for (s = sechdrs; s < sechdrs_end; s++) { 378 const char *secname = secstrs + s->sh_name; 379 380 if (!(s->sh_flags & SHF_ALLOC)) 381 continue; 382 383 if (strcmp(".ARM.exidx.init.text", secname) == 0) 384 maps[ARM_SEC_INIT].unw_sec = s; 385 else if (strcmp(".ARM.exidx", secname) == 0) 386 maps[ARM_SEC_CORE].unw_sec = s; 387 else if (strcmp(".ARM.exidx.exit.text", secname) == 0) 388 maps[ARM_SEC_EXIT].unw_sec = s; 389 else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0) 390 maps[ARM_SEC_UNLIKELY].unw_sec = s; 391 else if (strcmp(".ARM.exidx.text.hot", secname) == 0) 392 maps[ARM_SEC_HOT].unw_sec = s; 393 else if (strcmp(".init.text", secname) == 0) 394 maps[ARM_SEC_INIT].txt_sec = s; 395 else if (strcmp(".text", secname) == 0) 396 maps[ARM_SEC_CORE].txt_sec = s; 397 else if (strcmp(".exit.text", secname) == 0) 398 maps[ARM_SEC_EXIT].txt_sec = s; 399 else if (strcmp(".text.unlikely", secname) == 0) 400 maps[ARM_SEC_UNLIKELY].txt_sec = s; 401 else if (strcmp(".text.hot", secname) == 0) 402 maps[ARM_SEC_HOT].txt_sec = s; 403 } 404 405 for (i = 0; i < ARM_SEC_MAX; i++) 406 if (maps[i].unw_sec && maps[i].txt_sec) 407 mod->arch.unwind[i] = 408 unwind_table_add(maps[i].unw_sec->sh_addr, 409 maps[i].unw_sec->sh_size, 410 maps[i].txt_sec->sh_addr, 411 maps[i].txt_sec->sh_size); 412 #endif 413 #ifdef CONFIG_ARM_PATCH_PHYS_VIRT 414 s = find_mod_section(hdr, sechdrs, ".pv_table"); 415 if (s) 416 fixup_pv_table((void *)s->sh_addr, s->sh_size); 417 #endif 418 s = find_mod_section(hdr, sechdrs, ".alt.smp.init"); 419 if (s && !is_smp()) 420 #ifdef CONFIG_SMP_ON_UP 421 fixup_smp((void *)s->sh_addr, s->sh_size); 422 #else 423 return -EINVAL; 424 #endif 425 return 0; 426 } 427 428 void 429 module_arch_cleanup(struct module *mod) 430 { 431 #ifdef CONFIG_ARM_UNWIND 432 int i; 433 434 for (i = 0; i < ARM_SEC_MAX; i++) { 435 unwind_table_del(mod->arch.unwind[i]); 436 mod->arch.unwind[i] = NULL; 437 } 438 #endif 439 } 440 441 void __weak module_arch_freeing_init(struct module *mod) 442 { 443 #ifdef CONFIG_ARM_UNWIND 444 unwind_table_del(mod->arch.unwind[ARM_SEC_INIT]); 445 mod->arch.unwind[ARM_SEC_INIT] = NULL; 446 #endif 447 } 448