xref: /linux/arch/arm/kernel/head-nommu.S (revision 7b12b9137930eb821b68e1bfa11e9de692208620)
1/*
2 *  linux/arch/arm/kernel/head-nommu.S
3 *
4 *  Copyright (C) 1994-2002 Russell King
5 *  Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 *  Common kernel startup code (non-paged MM)
12 *    for 32-bit CPUs which has a process ID register(CP15).
13 *
14 */
15#include <linux/config.h>
16#include <linux/linkage.h>
17#include <linux/init.h>
18
19#include <asm/assembler.h>
20#include <asm/mach-types.h>
21#include <asm/procinfo.h>
22#include <asm/ptrace.h>
23#include <asm/thread_info.h>
24#include <asm/system.h>
25
26#define PROCINFO_INITFUNC       12
27#define MACHINFO_TYPE		0
28
29/*
30 * Kernel startup entry point.
31 * ---------------------------
32 *
33 * This is normally called from the decompressor code.  The requirements
34 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
35 * r1 = machine nr.
36 *
37 * See linux/arch/arm/tools/mach-types for the complete list of machine
38 * numbers for r1.
39 *
40 */
41	__INIT
42	.type	stext, %function
43ENTRY(stext)
44	msr	cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
45						@ and irqs disabled
46	mrc	p15, 0, r9, c0, c0		@ get processor id
47	bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
48	movs	r10, r5				@ invalid processor (r5=0)?
49	beq	__error_p				@ yes, error 'p'
50	bl	__lookup_machine_type		@ r5=machinfo
51	movs	r8, r5				@ invalid machine (r5=0)?
52	beq	__error_a			@ yes, error 'a'
53
54	ldr	r13, __switch_data		@ address to jump to after
55						@ the initialization is done
56	adr	lr, __after_proc_init		@ return (PIC) address
57	add	pc, r10, #PROCINFO_INITFUNC
58
59/*
60 * Set the Control Register and Read the process ID.
61 */
62	.type	__after_proc_init, %function
63__after_proc_init:
64	mrc	p15, 0, r0, c1, c0, 0		@ read control reg
65#ifdef CONFIG_ALIGNMENT_TRAP
66	orr	r0, r0, #CR_A
67#else
68	bic	r0, r0, #CR_A
69#endif
70#ifdef CONFIG_CPU_DCACHE_DISABLE
71	bic	r0, r0, #CR_C
72#endif
73#ifdef CONFIG_CPU_BPREDICT_DISABLE
74	bic	r0, r0, #CR_Z
75#endif
76#ifdef CONFIG_CPU_ICACHE_DISABLE
77	bic	r0, r0, #CR_I
78#endif
79	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
80
81	mov	pc, r13				@ clear the BSS and jump
82						@ to start_kernel
83	.ltorg
84
85#include "head-common.S"
86