1*fa04e4dbSRob Herring/* arch/arm/mach-realview/include/mach/debug-macro.S 2*fa04e4dbSRob Herring * 3*fa04e4dbSRob Herring * Debugging macro include header 4*fa04e4dbSRob Herring * 5*fa04e4dbSRob Herring * Copyright (C) 1994-1999 Russell King 6*fa04e4dbSRob Herring * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7*fa04e4dbSRob Herring * 8*fa04e4dbSRob Herring * This program is free software; you can redistribute it and/or modify 9*fa04e4dbSRob Herring * it under the terms of the GNU General Public License version 2 as 10*fa04e4dbSRob Herring * published by the Free Software Foundation. 11*fa04e4dbSRob Herring */ 12*fa04e4dbSRob Herring 13*fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE 0x10000000 14*fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET 0x00009000 15*fa04e4dbSRob Herring 16*fa04e4dbSRob Herring#define DEBUG_LL_PHYS_BASE_RS1 0x1c000000 17*fa04e4dbSRob Herring#define DEBUG_LL_UART_OFFSET_RS1 0x00090000 18*fa04e4dbSRob Herring 19*fa04e4dbSRob Herring#define DEBUG_LL_VIRT_BASE 0xf8000000 20*fa04e4dbSRob Herring 21*fa04e4dbSRob Herring#if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) 22*fa04e4dbSRob Herring 23*fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 24*fa04e4dbSRob Herring 25*fa04e4dbSRob Herring @ Make an educated guess regarding the memory map: 26*fa04e4dbSRob Herring @ - the original A9 core tile, which has MPCore peripherals 27*fa04e4dbSRob Herring @ located at 0x1e000000, should use UART at 0x10009000 28*fa04e4dbSRob Herring @ - all other (RS1 complaint) tiles use UART mapped 29*fa04e4dbSRob Herring @ at 0x1c090000 30*fa04e4dbSRob Herring mrc p15, 4, \tmp, c15, c0, 0 31*fa04e4dbSRob Herring cmp \tmp, #0x1e000000 32*fa04e4dbSRob Herring 33*fa04e4dbSRob Herring @ Original memory map 34*fa04e4dbSRob Herring moveq \rp, #DEBUG_LL_UART_OFFSET 35*fa04e4dbSRob Herring orreq \rv, \rp, #DEBUG_LL_VIRT_BASE 36*fa04e4dbSRob Herring orreq \rp, \rp, #DEBUG_LL_PHYS_BASE 37*fa04e4dbSRob Herring 38*fa04e4dbSRob Herring @ RS1 memory map 39*fa04e4dbSRob Herring movne \rp, #DEBUG_LL_UART_OFFSET_RS1 40*fa04e4dbSRob Herring orrne \rv, \rp, #DEBUG_LL_VIRT_BASE 41*fa04e4dbSRob Herring orrne \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 42*fa04e4dbSRob Herring 43*fa04e4dbSRob Herring .endm 44*fa04e4dbSRob Herring 45*fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 46*fa04e4dbSRob Herring 47*fa04e4dbSRob Herring#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9) 48*fa04e4dbSRob Herring 49*fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 50*fa04e4dbSRob Herring mov \rp, #DEBUG_LL_UART_OFFSET 51*fa04e4dbSRob Herring orr \rv, \rp, #DEBUG_LL_VIRT_BASE 52*fa04e4dbSRob Herring orr \rp, \rp, #DEBUG_LL_PHYS_BASE 53*fa04e4dbSRob Herring .endm 54*fa04e4dbSRob Herring 55*fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 56*fa04e4dbSRob Herring 57*fa04e4dbSRob Herring#elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1) 58*fa04e4dbSRob Herring 59*fa04e4dbSRob Herring .macro addruart,rp,rv,tmp 60*fa04e4dbSRob Herring mov \rp, #DEBUG_LL_UART_OFFSET_RS1 61*fa04e4dbSRob Herring orr \rv, \rp, #DEBUG_LL_VIRT_BASE 62*fa04e4dbSRob Herring orr \rp, \rp, #DEBUG_LL_PHYS_BASE_RS1 63*fa04e4dbSRob Herring .endm 64*fa04e4dbSRob Herring 65*fa04e4dbSRob Herring#include <asm/hardware/debug-pl01x.S> 66*fa04e4dbSRob Herring 67*fa04e4dbSRob Herring#else /* CONFIG_DEBUG_LL_UART_NONE */ 68*fa04e4dbSRob Herring 69*fa04e4dbSRob Herring .macro addruart, rp, rv, tmp 70*fa04e4dbSRob Herring /* Safe dummy values */ 71*fa04e4dbSRob Herring mov \rp, #0 72*fa04e4dbSRob Herring mov \rv, #DEBUG_LL_VIRT_BASE 73*fa04e4dbSRob Herring .endm 74*fa04e4dbSRob Herring 75*fa04e4dbSRob Herring .macro senduart,rd,rx 76*fa04e4dbSRob Herring .endm 77*fa04e4dbSRob Herring 78*fa04e4dbSRob Herring .macro waituart,rd,rx 79*fa04e4dbSRob Herring .endm 80*fa04e4dbSRob Herring 81*fa04e4dbSRob Herring .macro busyuart,rd,rx 82*fa04e4dbSRob Herring .endm 83*fa04e4dbSRob Herring 84*fa04e4dbSRob Herring#endif 85