1*d2912cb1SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */ 25026aecfSSrinivas Kandagatla/* 35026aecfSSrinivas Kandagatla * arch/arm/include/debug/sti.S 45026aecfSSrinivas Kandagatla * 55026aecfSSrinivas Kandagatla * Debugging macro include header 65026aecfSSrinivas Kandagatla * Copyright (C) 2013 STMicroelectronics (R&D) Limited. 75026aecfSSrinivas Kandagatla */ 85026aecfSSrinivas Kandagatla 95026aecfSSrinivas Kandagatla#define STIH41X_COMMS_BASE 0xfed00000 105026aecfSSrinivas Kandagatla#define STIH41X_ASC2_BASE (STIH41X_COMMS_BASE+0x32000) 115026aecfSSrinivas Kandagatla 125026aecfSSrinivas Kandagatla#define STIH41X_SBC_LPM_BASE 0xfe400000 135026aecfSSrinivas Kandagatla#define STIH41X_SBC_COMMS_BASE (STIH41X_SBC_LPM_BASE + 0x100000) 145026aecfSSrinivas Kandagatla#define STIH41X_SBC_ASC1_BASE (STIH41X_SBC_COMMS_BASE + 0x31000) 155026aecfSSrinivas Kandagatla 165026aecfSSrinivas Kandagatla 175026aecfSSrinivas Kandagatla#define VIRT_ADDRESS(x) (x - 0x1000000) 185026aecfSSrinivas Kandagatla 195026aecfSSrinivas Kandagatla#if IS_ENABLED(CONFIG_STIH41X_DEBUG_ASC2) 205026aecfSSrinivas Kandagatla#define DEBUG_LL_UART_BASE STIH41X_ASC2_BASE 215026aecfSSrinivas Kandagatla#endif 225026aecfSSrinivas Kandagatla 235026aecfSSrinivas Kandagatla#if IS_ENABLED(CONFIG_STIH41X_DEBUG_SBC_ASC1) 245026aecfSSrinivas Kandagatla#define DEBUG_LL_UART_BASE STIH41X_SBC_ASC1_BASE 255026aecfSSrinivas Kandagatla#endif 265026aecfSSrinivas Kandagatla 275026aecfSSrinivas Kandagatla#ifndef DEBUG_LL_UART_BASE 285026aecfSSrinivas Kandagatla#error "DEBUG UART is not Configured" 295026aecfSSrinivas Kandagatla#endif 305026aecfSSrinivas Kandagatla 315026aecfSSrinivas Kandagatla#define ASC_TX_BUF_OFF 0x04 325026aecfSSrinivas Kandagatla#define ASC_CTRL_OFF 0x0c 335026aecfSSrinivas Kandagatla#define ASC_STA_OFF 0x14 345026aecfSSrinivas Kandagatla 355026aecfSSrinivas Kandagatla#define ASC_STA_TX_FULL (1<<9) 365026aecfSSrinivas Kandagatla#define ASC_STA_TX_EMPTY (1<<1) 375026aecfSSrinivas Kandagatla 385026aecfSSrinivas Kandagatla 395026aecfSSrinivas Kandagatla .macro addruart, rp, rv, tmp 405026aecfSSrinivas Kandagatla ldr \rp, =DEBUG_LL_UART_BASE @ physical base 415026aecfSSrinivas Kandagatla ldr \rv, =VIRT_ADDRESS(DEBUG_LL_UART_BASE) @ virt base 425026aecfSSrinivas Kandagatla .endm 435026aecfSSrinivas Kandagatla 445026aecfSSrinivas Kandagatla .macro senduart,rd,rx 455026aecfSSrinivas Kandagatla strb \rd, [\rx, #ASC_TX_BUF_OFF] 465026aecfSSrinivas Kandagatla .endm 475026aecfSSrinivas Kandagatla 485026aecfSSrinivas Kandagatla .macro waituart,rd,rx 495026aecfSSrinivas Kandagatla1001: ldr \rd, [\rx, #ASC_STA_OFF] 505026aecfSSrinivas Kandagatla tst \rd, #ASC_STA_TX_FULL 515026aecfSSrinivas Kandagatla bne 1001b 525026aecfSSrinivas Kandagatla .endm 535026aecfSSrinivas Kandagatla 545026aecfSSrinivas Kandagatla .macro busyuart,rd,rx 555026aecfSSrinivas Kandagatla1001: ldr \rd, [\rx, #ASC_STA_OFF] 565026aecfSSrinivas Kandagatla tst \rd, #ASC_STA_TX_EMPTY 575026aecfSSrinivas Kandagatla beq 1001b 585026aecfSSrinivas Kandagatla .endm 59