1*5026aecfSSrinivas Kandagatla/* 2*5026aecfSSrinivas Kandagatla * arch/arm/include/debug/sti.S 3*5026aecfSSrinivas Kandagatla * 4*5026aecfSSrinivas Kandagatla * Debugging macro include header 5*5026aecfSSrinivas Kandagatla * Copyright (C) 2013 STMicroelectronics (R&D) Limited. 6*5026aecfSSrinivas Kandagatla * 7*5026aecfSSrinivas Kandagatla * This program is free software; you can redistribute it and/or modify 8*5026aecfSSrinivas Kandagatla * it under the terms of the GNU General Public License version 2 as 9*5026aecfSSrinivas Kandagatla * published by the Free Software Foundation. 10*5026aecfSSrinivas Kandagatla */ 11*5026aecfSSrinivas Kandagatla 12*5026aecfSSrinivas Kandagatla#define STIH41X_COMMS_BASE 0xfed00000 13*5026aecfSSrinivas Kandagatla#define STIH41X_ASC2_BASE (STIH41X_COMMS_BASE+0x32000) 14*5026aecfSSrinivas Kandagatla 15*5026aecfSSrinivas Kandagatla#define STIH41X_SBC_LPM_BASE 0xfe400000 16*5026aecfSSrinivas Kandagatla#define STIH41X_SBC_COMMS_BASE (STIH41X_SBC_LPM_BASE + 0x100000) 17*5026aecfSSrinivas Kandagatla#define STIH41X_SBC_ASC1_BASE (STIH41X_SBC_COMMS_BASE + 0x31000) 18*5026aecfSSrinivas Kandagatla 19*5026aecfSSrinivas Kandagatla 20*5026aecfSSrinivas Kandagatla#define VIRT_ADDRESS(x) (x - 0x1000000) 21*5026aecfSSrinivas Kandagatla 22*5026aecfSSrinivas Kandagatla#if IS_ENABLED(CONFIG_STIH41X_DEBUG_ASC2) 23*5026aecfSSrinivas Kandagatla#define DEBUG_LL_UART_BASE STIH41X_ASC2_BASE 24*5026aecfSSrinivas Kandagatla#endif 25*5026aecfSSrinivas Kandagatla 26*5026aecfSSrinivas Kandagatla#if IS_ENABLED(CONFIG_STIH41X_DEBUG_SBC_ASC1) 27*5026aecfSSrinivas Kandagatla#define DEBUG_LL_UART_BASE STIH41X_SBC_ASC1_BASE 28*5026aecfSSrinivas Kandagatla#endif 29*5026aecfSSrinivas Kandagatla 30*5026aecfSSrinivas Kandagatla#ifndef DEBUG_LL_UART_BASE 31*5026aecfSSrinivas Kandagatla#error "DEBUG UART is not Configured" 32*5026aecfSSrinivas Kandagatla#endif 33*5026aecfSSrinivas Kandagatla 34*5026aecfSSrinivas Kandagatla#define ASC_TX_BUF_OFF 0x04 35*5026aecfSSrinivas Kandagatla#define ASC_CTRL_OFF 0x0c 36*5026aecfSSrinivas Kandagatla#define ASC_STA_OFF 0x14 37*5026aecfSSrinivas Kandagatla 38*5026aecfSSrinivas Kandagatla#define ASC_STA_TX_FULL (1<<9) 39*5026aecfSSrinivas Kandagatla#define ASC_STA_TX_EMPTY (1<<1) 40*5026aecfSSrinivas Kandagatla 41*5026aecfSSrinivas Kandagatla 42*5026aecfSSrinivas Kandagatla .macro addruart, rp, rv, tmp 43*5026aecfSSrinivas Kandagatla ldr \rp, =DEBUG_LL_UART_BASE @ physical base 44*5026aecfSSrinivas Kandagatla ldr \rv, =VIRT_ADDRESS(DEBUG_LL_UART_BASE) @ virt base 45*5026aecfSSrinivas Kandagatla .endm 46*5026aecfSSrinivas Kandagatla 47*5026aecfSSrinivas Kandagatla .macro senduart,rd,rx 48*5026aecfSSrinivas Kandagatla strb \rd, [\rx, #ASC_TX_BUF_OFF] 49*5026aecfSSrinivas Kandagatla .endm 50*5026aecfSSrinivas Kandagatla 51*5026aecfSSrinivas Kandagatla .macro waituart,rd,rx 52*5026aecfSSrinivas Kandagatla1001: ldr \rd, [\rx, #ASC_STA_OFF] 53*5026aecfSSrinivas Kandagatla tst \rd, #ASC_STA_TX_FULL 54*5026aecfSSrinivas Kandagatla bne 1001b 55*5026aecfSSrinivas Kandagatla .endm 56*5026aecfSSrinivas Kandagatla 57*5026aecfSSrinivas Kandagatla .macro busyuart,rd,rx 58*5026aecfSSrinivas Kandagatla1001: ldr \rd, [\rx, #ASC_STA_OFF] 59*5026aecfSSrinivas Kandagatla tst \rd, #ASC_STA_TX_EMPTY 60*5026aecfSSrinivas Kandagatla beq 1001b 61*5026aecfSSrinivas Kandagatla .endm 62