xref: /linux/arch/arm/include/debug/renesas-scif.S (revision 4ba24fef3eb3b142197135223b90ced2f319cd53)
1/*
2 * Renesas SCIF(A) debugging macro include header
3 *
4 * Based on r8a7790.S
5 *
6 * Copyright (C) 2012-2013 Renesas Electronics Corporation
7 * Copyright (C) 1994-1999 Russell King
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#define SCIF_PHYS	CONFIG_DEBUG_UART_PHYS
15#define SCIF_VIRT	((SCIF_PHYS & 0x00ffffff) | 0xfd000000)
16
17#if CONFIG_DEBUG_UART_PHYS < 0xe6e00000
18/* SCIFA */
19#define FTDR		0x20
20#define FSR		0x14
21#else
22/* SCIF */
23#define FTDR		0x0c
24#define FSR		0x10
25#endif
26
27#define TDFE	(1 << 5)
28#define TEND	(1 << 6)
29
30	.macro	addruart, rp, rv, tmp
31	ldr	\rp, =SCIF_PHYS
32	ldr	\rv, =SCIF_VIRT
33	.endm
34
35	.macro	waituart, rd, rx
361001:	ldrh	\rd, [\rx, #FSR]
37	tst	\rd, #TDFE
38	beq	1001b
39	.endm
40
41	.macro	senduart, rd, rx
42	strb	\rd, [\rx, #FTDR]
43	ldrh	\rd, [\rx, #FSR]
44	bic	\rd, \rd, #TEND
45	strh	\rd, [\rx, #FSR]
46	.endm
47
48	.macro	busyuart, rd, rx
491001:	ldrh	\rd, [\rx, #FSR]
50	tst	\rd, #TEND
51	beq	1001b
52	.endm
53