xref: /linux/arch/arm/include/debug/at91.S (revision ca55b2fef3a9373fcfc30f82fd26bc7fccbda732)
1/*
2 *  Copyright (C) 2003-2005 SAN People
3 *
4 * Debugging macro include header
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10*/
11
12#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
13#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
14#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
15#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
16#elif defined(CONFIG_AT91_DEBUG_LL_DBGU2)
17/* On sama5d4, use USART3 as low level serial console */
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#else
20/* On sama5d2, use UART1 as low level serial console */
21#define AT91_DBGU 0xf8020000
22#endif
23
24#ifdef CONFIG_MMU
25#define AT91_IO_P2V(x) ((x) - 0x01000000)
26#else
27#define AT91_IO_P2V(x) (x)
28#endif
29
30#define AT91_DBGU_SR		(0x14)	/* Status Register */
31#define AT91_DBGU_THR		(0x1c)	/* Transmitter Holding Register */
32#define AT91_DBGU_TXRDY		(1 << 1)	/* Transmitter Ready */
33#define AT91_DBGU_TXEMPTY	(1 << 9)	/* Transmitter Empty */
34
35	.macro	addruart, rp, rv, tmp
36	ldr	\rp, =AT91_DBGU				@ System peripherals (phys address)
37	ldr	\rv, =AT91_IO_P2V(AT91_DBGU)		@ System peripherals (virt address)
38	.endm
39
40	.macro	senduart,rd,rx
41	strb	\rd, [\rx, #(AT91_DBGU_THR)]		@ Write to Transmitter Holding Register
42	.endm
43
44	.macro	waituart,rd,rx
451001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
46	tst	\rd, #AT91_DBGU_TXRDY			@ DBGU_TXRDY = 1 when ready to transmit
47	beq	1001b
48	.endm
49
50	.macro	busyuart,rd,rx
511001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
52	tst	\rd, #AT91_DBGU_TXEMPTY			@ DBGU_TXEMPTY = 1 when transmission complete
53	beq	1001b
54	.endm
55
56