xref: /linux/arch/arm/include/debug/at91.S (revision c0e297dc61f8d4453e07afbea1fa8d0e67cd4a34)
1/*
2 *  Copyright (C) 2003-2005 SAN People
3 *
4 * Debugging macro include header
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10*/
11
12#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
13#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
14#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
15#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
16#else
17/* On sama5d4, use USART3 as low level serial console */
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#endif
20
21#ifdef CONFIG_MMU
22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23#else
24#define AT91_IO_P2V(x) (x)
25#endif
26
27#define AT91_DBGU_SR		(0x14)	/* Status Register */
28#define AT91_DBGU_THR		(0x1c)	/* Transmitter Holding Register */
29#define AT91_DBGU_TXRDY		(1 << 1)	/* Transmitter Ready */
30#define AT91_DBGU_TXEMPTY	(1 << 9)	/* Transmitter Empty */
31
32	.macro	addruart, rp, rv, tmp
33	ldr	\rp, =AT91_DBGU				@ System peripherals (phys address)
34	ldr	\rv, =AT91_IO_P2V(AT91_DBGU)		@ System peripherals (virt address)
35	.endm
36
37	.macro	senduart,rd,rx
38	strb	\rd, [\rx, #(AT91_DBGU_THR)]		@ Write to Transmitter Holding Register
39	.endm
40
41	.macro	waituart,rd,rx
421001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
43	tst	\rd, #AT91_DBGU_TXRDY			@ DBGU_TXRDY = 1 when ready to transmit
44	beq	1001b
45	.endm
46
47	.macro	busyuart,rd,rx
481001:	ldr	\rd, [\rx, #(AT91_DBGU_SR)]		@ Read Status Register
49	tst	\rd, #AT91_DBGU_TXEMPTY			@ DBGU_TXEMPTY = 1 when transmission complete
50	beq	1001b
51	.endm
52
53