xref: /linux/arch/arm/include/asm/tls.h (revision 60e13231561b3a4c5269bfa1ef6c0569ad6f28ec)
1 #ifndef __ASMARM_TLS_H
2 #define __ASMARM_TLS_H
3 
4 #ifdef __ASSEMBLY__
5 	.macro set_tls_none, tp, tmp1, tmp2
6 	.endm
7 
8 	.macro set_tls_v6k, tp, tmp1, tmp2
9 	mcr	p15, 0, \tp, c13, c0, 3		@ set TLS register
10 	.endm
11 
12 	.macro set_tls_v6, tp, tmp1, tmp2
13 	ldr	\tmp1, =elf_hwcap
14 	ldr	\tmp1, [\tmp1, #0]
15 	mov	\tmp2, #0xffff0fff
16 	tst	\tmp1, #HWCAP_TLS		@ hardware TLS available?
17 	mcrne	p15, 0, \tp, c13, c0, 3		@ yes, set TLS register
18 	streq	\tp, [\tmp2, #-15]		@ set TLS value at 0xffff0ff0
19 	.endm
20 
21 	.macro set_tls_software, tp, tmp1, tmp2
22 	mov	\tmp1, #0xffff0fff
23 	str	\tp, [\tmp1, #-15]		@ set TLS value at 0xffff0ff0
24 	.endm
25 #endif
26 
27 #ifdef CONFIG_TLS_REG_EMUL
28 #define tls_emu		1
29 #define has_tls_reg		1
30 #define set_tls		set_tls_none
31 #elif defined(CONFIG_CPU_V6)
32 #define tls_emu		0
33 #define has_tls_reg		(elf_hwcap & HWCAP_TLS)
34 #define set_tls		set_tls_v6
35 #elif defined(CONFIG_CPU_32v6K)
36 #define tls_emu		0
37 #define has_tls_reg		1
38 #define set_tls		set_tls_v6k
39 #else
40 #define tls_emu		0
41 #define has_tls_reg		0
42 #define set_tls		set_tls_software
43 #endif
44 
45 #endif	/* __ASMARM_TLS_H */
46