xref: /linux/arch/arm/include/asm/smp_twd.h (revision b24413180f5600bcb3bb70fbed5cf186b60864bd)
1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2f32f4ce2SRussell King #ifndef __ASMARM_SMP_TWD_H
3f32f4ce2SRussell King #define __ASMARM_SMP_TWD_H
4f32f4ce2SRussell King 
5f4a27aedSSrinidhi Kasagar #define TWD_TIMER_LOAD			0x00
6f4a27aedSSrinidhi Kasagar #define TWD_TIMER_COUNTER		0x04
7f4a27aedSSrinidhi Kasagar #define TWD_TIMER_CONTROL		0x08
8f4a27aedSSrinidhi Kasagar #define TWD_TIMER_INTSTAT		0x0C
9f4a27aedSSrinidhi Kasagar 
10f4a27aedSSrinidhi Kasagar #define TWD_WDOG_LOAD			0x20
11f4a27aedSSrinidhi Kasagar #define TWD_WDOG_COUNTER		0x24
12f4a27aedSSrinidhi Kasagar #define TWD_WDOG_CONTROL		0x28
13f4a27aedSSrinidhi Kasagar #define TWD_WDOG_INTSTAT		0x2C
14f4a27aedSSrinidhi Kasagar #define TWD_WDOG_RESETSTAT		0x30
15f4a27aedSSrinidhi Kasagar #define TWD_WDOG_DISABLE		0x34
16f4a27aedSSrinidhi Kasagar 
17f4a27aedSSrinidhi Kasagar #define TWD_TIMER_CONTROL_ENABLE	(1 << 0)
18f4a27aedSSrinidhi Kasagar #define TWD_TIMER_CONTROL_ONESHOT	(0 << 1)
19f4a27aedSSrinidhi Kasagar #define TWD_TIMER_CONTROL_PERIODIC	(1 << 1)
20f4a27aedSSrinidhi Kasagar #define TWD_TIMER_CONTROL_IT_ENABLE	(1 << 2)
21f4a27aedSSrinidhi Kasagar 
2281e46f7bSMarc Zyngier #include <linux/ioport.h>
2381e46f7bSMarc Zyngier 
2481e46f7bSMarc Zyngier struct twd_local_timer {
2581e46f7bSMarc Zyngier 	struct resource	res[2];
2681e46f7bSMarc Zyngier };
2781e46f7bSMarc Zyngier 
2881e46f7bSMarc Zyngier #define DEFINE_TWD_LOCAL_TIMER(name,base,irq)	\
2981e46f7bSMarc Zyngier struct twd_local_timer name __initdata = {	\
3081e46f7bSMarc Zyngier 	.res	= {				\
3181e46f7bSMarc Zyngier 		DEFINE_RES_MEM(base, 0x10),	\
3281e46f7bSMarc Zyngier 		DEFINE_RES_IRQ(irq),		\
3381e46f7bSMarc Zyngier 	},					\
3481e46f7bSMarc Zyngier };
3581e46f7bSMarc Zyngier 
3681e46f7bSMarc Zyngier int twd_local_timer_register(struct twd_local_timer *);
37f32f4ce2SRussell King 
38f32f4ce2SRussell King #endif
39