1e616c591SRussell King /* 2e616c591SRussell King * ARM specific SMP header, this contains our implementation 3e616c591SRussell King * details. 4e616c591SRussell King */ 5e616c591SRussell King #ifndef __ASMARM_SMP_PLAT_H 6e616c591SRussell King #define __ASMARM_SMP_PLAT_H 7e616c591SRussell King 8e616c591SRussell King #include <asm/cputype.h> 9e616c591SRussell King 10e616c591SRussell King /* all SMP configurations have the extended CPUID registers */ 11e616c591SRussell King static inline int tlb_ops_need_broadcast(void) 12e616c591SRussell King { 13e616c591SRussell King return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; 14e616c591SRussell King } 15e616c591SRussell King 16*85848dd7SCatalin Marinas #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 17*85848dd7SCatalin Marinas #define cache_ops_need_broadcast() 0 18*85848dd7SCatalin Marinas #else 192ef7f3dbSRussell King static inline int cache_ops_need_broadcast(void) 202ef7f3dbSRussell King { 212ef7f3dbSRussell King return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; 222ef7f3dbSRussell King } 23*85848dd7SCatalin Marinas #endif 242ef7f3dbSRussell King 25e616c591SRussell King #endif 26