1e616c591SRussell King /* 2e616c591SRussell King * ARM specific SMP header, this contains our implementation 3e616c591SRussell King * details. 4e616c591SRussell King */ 5e616c591SRussell King #ifndef __ASMARM_SMP_PLAT_H 6e616c591SRussell King #define __ASMARM_SMP_PLAT_H 7e616c591SRussell King 8e616c591SRussell King #include <asm/cputype.h> 9e616c591SRussell King 10f00ec48fSRussell King /* 11f00ec48fSRussell King * Return true if we are running on a SMP platform 12f00ec48fSRussell King */ 13f00ec48fSRussell King static inline bool is_smp(void) 14f00ec48fSRussell King { 15f00ec48fSRussell King #ifndef CONFIG_SMP 16f00ec48fSRussell King return false; 17f00ec48fSRussell King #elif defined(CONFIG_SMP_ON_UP) 18f00ec48fSRussell King extern unsigned int smp_on_up; 19f00ec48fSRussell King return !!smp_on_up; 20f00ec48fSRussell King #else 21f00ec48fSRussell King return true; 22f00ec48fSRussell King #endif 23f00ec48fSRussell King } 24f00ec48fSRussell King 25*7511db9dSTony Lindgren /* all SMP configurations have the extended CPUID registers */ 26*7511db9dSTony Lindgren static inline int tlb_ops_need_broadcast(void) 27*7511db9dSTony Lindgren { 28*7511db9dSTony Lindgren if (!is_smp()) 29*7511db9dSTony Lindgren return 0; 30*7511db9dSTony Lindgren 31*7511db9dSTony Lindgren return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; 32*7511db9dSTony Lindgren } 33*7511db9dSTony Lindgren 34*7511db9dSTony Lindgren static inline int cache_ops_need_broadcast(void) 35*7511db9dSTony Lindgren { 36*7511db9dSTony Lindgren if (!is_smp()) 37*7511db9dSTony Lindgren return 0; 38*7511db9dSTony Lindgren 39*7511db9dSTony Lindgren return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; 40*7511db9dSTony Lindgren } 41*7511db9dSTony Lindgren 42e616c591SRussell King #endif 43