1e616c591SRussell King /* 2e616c591SRussell King * ARM specific SMP header, this contains our implementation 3e616c591SRussell King * details. 4e616c591SRussell King */ 5e616c591SRussell King #ifndef __ASMARM_SMP_PLAT_H 6e616c591SRussell King #define __ASMARM_SMP_PLAT_H 7e616c591SRussell King 87f124aafSLorenzo Pieralisi #include <linux/cpumask.h> 97f124aafSLorenzo Pieralisi #include <linux/err.h> 107f124aafSLorenzo Pieralisi 11e616c591SRussell King #include <asm/cputype.h> 12e616c591SRussell King 13f00ec48fSRussell King /* 14f00ec48fSRussell King * Return true if we are running on a SMP platform 15f00ec48fSRussell King */ 16f00ec48fSRussell King static inline bool is_smp(void) 17f00ec48fSRussell King { 18f00ec48fSRussell King #ifndef CONFIG_SMP 19f00ec48fSRussell King return false; 20f00ec48fSRussell King #elif defined(CONFIG_SMP_ON_UP) 21f00ec48fSRussell King extern unsigned int smp_on_up; 22f00ec48fSRussell King return !!smp_on_up; 23f00ec48fSRussell King #else 24f00ec48fSRussell King return true; 25f00ec48fSRussell King #endif 26f00ec48fSRussell King } 27f00ec48fSRussell King 28e616c591SRussell King /* all SMP configurations have the extended CPUID registers */ 29*5c709e69SWill Deacon #ifndef CONFIG_MMU 30*5c709e69SWill Deacon #define tlb_ops_need_broadcast() 0 31*5c709e69SWill Deacon #else 32e616c591SRussell King static inline int tlb_ops_need_broadcast(void) 33e616c591SRussell King { 347511db9dSTony Lindgren if (!is_smp()) 357511db9dSTony Lindgren return 0; 367511db9dSTony Lindgren 37e616c591SRussell King return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; 38e616c591SRussell King } 39*5c709e69SWill Deacon #endif 40e616c591SRussell King 4185848dd7SCatalin Marinas #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 4285848dd7SCatalin Marinas #define cache_ops_need_broadcast() 0 4385848dd7SCatalin Marinas #else 442ef7f3dbSRussell King static inline int cache_ops_need_broadcast(void) 452ef7f3dbSRussell King { 467511db9dSTony Lindgren if (!is_smp()) 477511db9dSTony Lindgren return 0; 487511db9dSTony Lindgren 492ef7f3dbSRussell King return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; 502ef7f3dbSRussell King } 5185848dd7SCatalin Marinas #endif 522ef7f3dbSRussell King 53eb50439bSWill Deacon /* 54eb50439bSWill Deacon * Logical CPU mapping. 55eb50439bSWill Deacon */ 56eb50439bSWill Deacon extern int __cpu_logical_map[]; 57eb50439bSWill Deacon #define cpu_logical_map(cpu) __cpu_logical_map[cpu] 587f124aafSLorenzo Pieralisi /* 597f124aafSLorenzo Pieralisi * Retrieve logical cpu index corresponding to a given MPIDR[23:0] 607f124aafSLorenzo Pieralisi * - mpidr: MPIDR[23:0] to be used for the look-up 617f124aafSLorenzo Pieralisi * 627f124aafSLorenzo Pieralisi * Returns the cpu logical index or -EINVAL on look-up error 637f124aafSLorenzo Pieralisi */ 647f124aafSLorenzo Pieralisi static inline int get_logical_index(u32 mpidr) 657f124aafSLorenzo Pieralisi { 667f124aafSLorenzo Pieralisi int cpu; 677f124aafSLorenzo Pieralisi for (cpu = 0; cpu < nr_cpu_ids; cpu++) 687f124aafSLorenzo Pieralisi if (cpu_logical_map(cpu) == mpidr) 697f124aafSLorenzo Pieralisi return cpu; 707f124aafSLorenzo Pieralisi return -EINVAL; 717f124aafSLorenzo Pieralisi } 72eb50439bSWill Deacon 73e616c591SRussell King #endif 74