xref: /linux/arch/arm/include/asm/pgtable.h (revision f694f30e81c4ade358eb8c75273bac1a48f0cb8f) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  *  arch/arm/include/asm/pgtable.h
4  *
5  *  Copyright (C) 1995-2002 Russell King
6  */
7 #ifndef _ASMARM_PGTABLE_H
8 #define _ASMARM_PGTABLE_H
9 
10 #include <linux/const.h>
11 #include <asm/proc-fns.h>
12 
13 #ifndef __ASSEMBLY__
14 /*
15  * ZERO_PAGE is a global shared page that is always zero: used
16  * for zero-mapped memory areas etc..
17  */
18 extern struct page *empty_zero_page;
19 #define ZERO_PAGE(vaddr)	(empty_zero_page)
20 #endif
21 
22 #include <asm-generic/pgtable-nopud.h>
23 
24 #ifndef CONFIG_MMU
25 #include <asm/pgtable-nommu.h>
26 
27 #else
28 
29 #include <asm/page.h>
30 #include <asm/pgtable-hwdef.h>
31 
32 
33 #include <asm/tlbflush.h>
34 
35 #ifdef CONFIG_ARM_LPAE
36 #include <asm/pgtable-3level.h>
37 #else
38 #include <asm/pgtable-2level.h>
39 #endif
40 
41 /*
42  * Just any arbitrary offset to the start of the vmalloc VM area: the
43  * current 8MB value just means that there will be a 8MB "hole" after the
44  * physical memory until the kernel virtual memory starts.  That means that
45  * any out-of-bounds memory accesses will hopefully be caught.
46  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
47  * area for the same reason. ;)
48  */
49 #define VMALLOC_OFFSET		(8*1024*1024)
50 #define VMALLOC_START		(((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
51 #define VMALLOC_END		0xff800000UL
52 
53 #define LIBRARY_TEXT_START	0x0c000000
54 
55 #ifndef __ASSEMBLY__
56 extern void __pte_error(const char *file, int line, pte_t);
57 extern void __pmd_error(const char *file, int line, pmd_t);
58 extern void __pgd_error(const char *file, int line, pgd_t);
59 
60 #define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte)
61 #define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd)
62 #define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd)
63 
64 /*
65  * This is the lowest virtual address we can permit any user space
66  * mapping to be mapped at.  This is particularly important for
67  * non-high vector CPUs.
68  */
69 #define FIRST_USER_ADDRESS	(PAGE_SIZE * 2)
70 
71 /*
72  * Use TASK_SIZE as the ceiling argument for free_pgtables() and
73  * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
74  * page shared between user and kernel).
75  */
76 #ifdef CONFIG_ARM_LPAE
77 #define USER_PGTABLES_CEILING	TASK_SIZE
78 #endif
79 
80 /*
81  * The pgprot_* and protection_map entries will be fixed up in runtime
82  * to include the cachable and bufferable bits based on memory policy,
83  * as well as any architecture dependent bits like global/ASID and SMP
84  * shared mapping bits.
85  */
86 #define _L_PTE_DEFAULT	L_PTE_PRESENT | L_PTE_YOUNG
87 
88 extern pgprot_t		pgprot_user;
89 extern pgprot_t		pgprot_kernel;
90 
91 #define _MOD_PROT(p, b)	__pgprot(pgprot_val(p) | (b))
92 
93 #define PAGE_NONE		_MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
94 #define PAGE_SHARED		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
95 #define PAGE_SHARED_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER)
96 #define PAGE_COPY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
97 #define PAGE_COPY_EXEC		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
98 #define PAGE_READONLY		_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
99 #define PAGE_READONLY_EXEC	_MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
100 #define PAGE_KERNEL		_MOD_PROT(pgprot_kernel, L_PTE_XN)
101 #define PAGE_KERNEL_EXEC	pgprot_kernel
102 
103 #define __PAGE_NONE		__pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
104 #define __PAGE_SHARED		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
105 #define __PAGE_SHARED_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER)
106 #define __PAGE_COPY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
107 #define __PAGE_COPY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
108 #define __PAGE_READONLY		__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
109 #define __PAGE_READONLY_EXEC	__pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
110 
111 #define __pgprot_modify(prot,mask,bits)		\
112 	__pgprot((pgprot_val(prot) & ~(mask)) | (bits))
113 
114 #define pgprot_noncached(prot) \
115 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
116 
117 #define pgprot_writecombine(prot) \
118 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
119 
120 #define pgprot_stronglyordered(prot) \
121 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
122 
123 #define pgprot_device(prot) \
124 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED | L_PTE_SHARED | L_PTE_DIRTY | L_PTE_XN)
125 
126 #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
127 #define pgprot_dmacoherent(prot) \
128 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
129 #define __HAVE_PHYS_MEM_ACCESS_PROT
130 struct file;
131 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
132 				     unsigned long size, pgprot_t vma_prot);
133 #else
134 #define pgprot_dmacoherent(prot) \
135 	__pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
136 #endif
137 
138 #endif /* __ASSEMBLY__ */
139 
140 /*
141  * The table below defines the page protection levels that we insert into our
142  * Linux page table version.  These get translated into the best that the
143  * architecture can perform.  Note that on most ARM hardware:
144  *  1) We cannot do execute protection
145  *  2) If we could do execute protection, then read is implied
146  *  3) write implies read permissions
147  */
148 
149 #ifndef __ASSEMBLY__
150 
151 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
152 
153 #define pgdp_get(pgpd)		READ_ONCE(*pgdp)
154 
155 #define pud_page(pud)		pmd_page(__pmd(pud_val(pud)))
156 #define pud_write(pud)		pmd_write(__pmd(pud_val(pud)))
157 
158 #define pmd_none(pmd)		(!pmd_val(pmd))
159 
160 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
161 {
162 	return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
163 }
164 
165 #define pmd_page(pmd)		pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
166 
167 #define pte_pfn(pte)		((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
168 #define pfn_pte(pfn,prot)	__pte(__pfn_to_phys(pfn) | pgprot_val(prot))
169 
170 #define pte_page(pte)		pfn_to_page(pte_pfn(pte))
171 #define mk_pte(page,prot)	pfn_pte(page_to_pfn(page), prot)
172 
173 #define pte_clear(mm,addr,ptep)	set_pte_ext(ptep, __pte(0), 0)
174 
175 #define pte_isset(pte, val)	((u32)(val) == (val) ? pte_val(pte) & (val) \
176 						: !!(pte_val(pte) & (val)))
177 #define pte_isclear(pte, val)	(!(pte_val(pte) & (val)))
178 
179 #define pte_none(pte)		(!pte_val(pte))
180 #define pte_present(pte)	(pte_isset((pte), L_PTE_PRESENT))
181 #define pte_valid(pte)		(pte_isset((pte), L_PTE_VALID))
182 #define pte_accessible(mm, pte)	(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
183 #define pte_write(pte)		(pte_isclear((pte), L_PTE_RDONLY))
184 #define pte_dirty(pte)		(pte_isset((pte), L_PTE_DIRTY))
185 #define pte_young(pte)		(pte_isset((pte), L_PTE_YOUNG))
186 #define pte_exec(pte)		(pte_isclear((pte), L_PTE_XN))
187 
188 #define pte_valid_user(pte)	\
189 	(pte_valid(pte) && pte_isset((pte), L_PTE_USER) && pte_young(pte))
190 
191 static inline bool pte_access_permitted(pte_t pte, bool write)
192 {
193 	pteval_t mask = L_PTE_PRESENT | L_PTE_USER;
194 	pteval_t needed = mask;
195 
196 	if (write)
197 		mask |= L_PTE_RDONLY;
198 
199 	return (pte_val(pte) & mask) == needed;
200 }
201 #define pte_access_permitted pte_access_permitted
202 
203 #if __LINUX_ARM_ARCH__ < 6
204 static inline void __sync_icache_dcache(pte_t pteval)
205 {
206 }
207 #else
208 extern void __sync_icache_dcache(pte_t pteval);
209 #endif
210 
211 #define PFN_PTE_SHIFT		PAGE_SHIFT
212 
213 void set_ptes(struct mm_struct *mm, unsigned long addr,
214 		      pte_t *ptep, pte_t pteval, unsigned int nr);
215 #define set_ptes set_ptes
216 
217 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
218 {
219 	pte_val(pte) &= ~pgprot_val(prot);
220 	return pte;
221 }
222 
223 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
224 {
225 	pte_val(pte) |= pgprot_val(prot);
226 	return pte;
227 }
228 
229 static inline pte_t pte_wrprotect(pte_t pte)
230 {
231 	return set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
232 }
233 
234 static inline pte_t pte_mkwrite_novma(pte_t pte)
235 {
236 	return clear_pte_bit(pte, __pgprot(L_PTE_RDONLY));
237 }
238 
239 static inline pte_t pte_mkclean(pte_t pte)
240 {
241 	return clear_pte_bit(pte, __pgprot(L_PTE_DIRTY));
242 }
243 
244 static inline pte_t pte_mkdirty(pte_t pte)
245 {
246 	return set_pte_bit(pte, __pgprot(L_PTE_DIRTY));
247 }
248 
249 static inline pte_t pte_mkold(pte_t pte)
250 {
251 	return clear_pte_bit(pte, __pgprot(L_PTE_YOUNG));
252 }
253 
254 static inline pte_t pte_mkyoung(pte_t pte)
255 {
256 	return set_pte_bit(pte, __pgprot(L_PTE_YOUNG));
257 }
258 
259 static inline pte_t pte_mkexec(pte_t pte)
260 {
261 	return clear_pte_bit(pte, __pgprot(L_PTE_XN));
262 }
263 
264 static inline pte_t pte_mknexec(pte_t pte)
265 {
266 	return set_pte_bit(pte, __pgprot(L_PTE_XN));
267 }
268 
269 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
270 {
271 	const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER |
272 		L_PTE_NONE | L_PTE_VALID;
273 	pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
274 	return pte;
275 }
276 
277 /*
278  * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
279  * are !pte_none() && !pte_present().
280  *
281  * Format of swap PTEs:
282  *
283  *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
284  *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
285  *   <------------------- offset ------------------> E < type -> 0 0
286  *
287  *   E is the exclusive marker that is not stored in swap entries.
288  *
289  * This gives us up to 31 swap files and 64GB per swap file.  Note that
290  * the offset field is always non-zero.
291  */
292 #define __SWP_TYPE_SHIFT	2
293 #define __SWP_TYPE_BITS		5
294 #define __SWP_TYPE_MASK		((1 << __SWP_TYPE_BITS) - 1)
295 #define __SWP_OFFSET_SHIFT	(__SWP_TYPE_BITS + __SWP_TYPE_SHIFT + 1)
296 
297 #define __swp_type(x)		(((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
298 #define __swp_offset(x)		((x).val >> __SWP_OFFSET_SHIFT)
299 #define __swp_entry(type, offset) ((swp_entry_t) { (((type) & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT) | \
300 						   ((offset) << __SWP_OFFSET_SHIFT) })
301 
302 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
303 #define __swp_entry_to_pte(swp)	__pte((swp).val)
304 
305 static inline int pte_swp_exclusive(pte_t pte)
306 {
307 	return pte_isset(pte, L_PTE_SWP_EXCLUSIVE);
308 }
309 
310 static inline pte_t pte_swp_mkexclusive(pte_t pte)
311 {
312 	return set_pte_bit(pte, __pgprot(L_PTE_SWP_EXCLUSIVE));
313 }
314 
315 static inline pte_t pte_swp_clear_exclusive(pte_t pte)
316 {
317 	return clear_pte_bit(pte, __pgprot(L_PTE_SWP_EXCLUSIVE));
318 }
319 
320 /*
321  * It is an error for the kernel to have more swap files than we can
322  * encode in the PTEs.  This ensures that we know when MAX_SWAPFILES
323  * is increased beyond what we presently support.
324  */
325 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
326 
327 /*
328  * We provide our own arch_get_unmapped_area to cope with VIPT caches.
329  */
330 #define HAVE_ARCH_UNMAPPED_AREA
331 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
332 
333 #endif /* !__ASSEMBLY__ */
334 
335 #endif /* CONFIG_MMU */
336 
337 #endif /* _ASMARM_PGTABLE_H */
338