xref: /linux/arch/arm/include/asm/outercache.h (revision cbac924200b838cfb8d8b1415113d788089dc50b)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * arch/arm/include/asm/outercache.h
4  *
5  * Copyright (C) 2010 ARM Ltd.
6  * Written by Catalin Marinas <catalin.marinas@arm.com>
7  */
8 
9 #ifndef __ASM_OUTERCACHE_H
10 #define __ASM_OUTERCACHE_H
11 
12 #include <linux/types.h>
13 
14 struct l2x0_regs;
15 
16 struct outer_cache_fns {
17 	void (*inv_range)(unsigned long, unsigned long);
18 	void (*clean_range)(unsigned long, unsigned long);
19 	void (*flush_range)(unsigned long, unsigned long);
20 	void (*flush_all)(void);
21 	void (*disable)(void);
22 #ifdef CONFIG_OUTER_CACHE_SYNC
23 	void (*sync)(void);
24 #endif
25 	void (*resume)(void);
26 
27 	/* This is an ARM L2C thing */
28 	void (*write_sec)(unsigned long, unsigned);
29 	void (*configure)(const struct l2x0_regs *);
30 };
31 
32 extern struct outer_cache_fns outer_cache;
33 
34 #ifdef CONFIG_OUTER_CACHE
35 /**
36  * outer_inv_range - invalidate range of outer cache lines
37  * @start: starting physical address, inclusive
38  * @end: end physical address, exclusive
39  */
40 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
41 {
42 	if (outer_cache.inv_range)
43 		outer_cache.inv_range(start, end);
44 }
45 
46 /**
47  * outer_clean_range - clean dirty outer cache lines
48  * @start: starting physical address, inclusive
49  * @end: end physical address, exclusive
50  */
51 static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
52 {
53 	if (outer_cache.clean_range)
54 		outer_cache.clean_range(start, end);
55 }
56 
57 /**
58  * outer_flush_range - clean and invalidate outer cache lines
59  * @start: starting physical address, inclusive
60  * @end: end physical address, exclusive
61  */
62 static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
63 {
64 	if (outer_cache.flush_range)
65 		outer_cache.flush_range(start, end);
66 }
67 
68 /**
69  * outer_flush_all - clean and invalidate all cache lines in the outer cache
70  *
71  * Note: depending on implementation, this may not be atomic - it must
72  * only be called with interrupts disabled and no other active outer
73  * cache masters.
74  *
75  * It is intended that this function is only used by implementations
76  * needing to override the outer_cache.disable() method due to security.
77  * (Some implementations perform this as a clean followed by an invalidate.)
78  */
79 static inline void outer_flush_all(void)
80 {
81 	if (outer_cache.flush_all)
82 		outer_cache.flush_all();
83 }
84 
85 /**
86  * outer_disable - clean, invalidate and disable the outer cache
87  *
88  * Disable the outer cache, ensuring that any data contained in the outer
89  * cache is pushed out to lower levels of system memory.  The note and
90  * conditions above concerning outer_flush_all() applies here.
91  */
92 extern void outer_disable(void);
93 
94 /**
95  * outer_resume - restore the cache configuration and re-enable outer cache
96  *
97  * Restore any configuration that the cache had when previously enabled,
98  * and re-enable the outer cache.
99  */
100 static inline void outer_resume(void)
101 {
102 	if (outer_cache.resume)
103 		outer_cache.resume();
104 }
105 
106 #else
107 
108 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
109 { }
110 static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
111 { }
112 static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
113 { }
114 static inline void outer_flush_all(void) { }
115 static inline void outer_disable(void) { }
116 static inline void outer_resume(void) { }
117 
118 #endif
119 
120 #endif	/* __ASM_OUTERCACHE_H */
121