xref: /linux/arch/arm/include/asm/irqflags.h (revision 0b88641f1bafdbd087d5e63987a30cc0eadd63b9)
1 #ifndef __ASM_ARM_IRQFLAGS_H
2 #define __ASM_ARM_IRQFLAGS_H
3 
4 #ifdef __KERNEL__
5 
6 #include <asm/ptrace.h>
7 
8 /*
9  * CPU interrupt mask handling.
10  */
11 #if __LINUX_ARM_ARCH__ >= 6
12 
13 #define raw_local_irq_save(x)					\
14 	({							\
15 	__asm__ __volatile__(					\
16 	"mrs	%0, cpsr		@ local_irq_save\n"	\
17 	"cpsid	i"						\
18 	: "=r" (x) : : "memory", "cc");				\
19 	})
20 
21 #define raw_local_irq_enable()  __asm__("cpsie i	@ __sti" : : : "memory", "cc")
22 #define raw_local_irq_disable() __asm__("cpsid i	@ __cli" : : : "memory", "cc")
23 #define local_fiq_enable()  __asm__("cpsie f	@ __stf" : : : "memory", "cc")
24 #define local_fiq_disable() __asm__("cpsid f	@ __clf" : : : "memory", "cc")
25 
26 #else
27 
28 /*
29  * Save the current interrupt enable state & disable IRQs
30  */
31 #define raw_local_irq_save(x)					\
32 	({							\
33 		unsigned long temp;				\
34 		(void) (&temp == &x);				\
35 	__asm__ __volatile__(					\
36 	"mrs	%0, cpsr		@ local_irq_save\n"	\
37 "	orr	%1, %0, #128\n"					\
38 "	msr	cpsr_c, %1"					\
39 	: "=r" (x), "=r" (temp)					\
40 	:							\
41 	: "memory", "cc");					\
42 	})
43 
44 /*
45  * Enable IRQs
46  */
47 #define raw_local_irq_enable()					\
48 	({							\
49 		unsigned long temp;				\
50 	__asm__ __volatile__(					\
51 	"mrs	%0, cpsr		@ local_irq_enable\n"	\
52 "	bic	%0, %0, #128\n"					\
53 "	msr	cpsr_c, %0"					\
54 	: "=r" (temp)						\
55 	:							\
56 	: "memory", "cc");					\
57 	})
58 
59 /*
60  * Disable IRQs
61  */
62 #define raw_local_irq_disable()					\
63 	({							\
64 		unsigned long temp;				\
65 	__asm__ __volatile__(					\
66 	"mrs	%0, cpsr		@ local_irq_disable\n"	\
67 "	orr	%0, %0, #128\n"					\
68 "	msr	cpsr_c, %0"					\
69 	: "=r" (temp)						\
70 	:							\
71 	: "memory", "cc");					\
72 	})
73 
74 /*
75  * Enable FIQs
76  */
77 #define local_fiq_enable()					\
78 	({							\
79 		unsigned long temp;				\
80 	__asm__ __volatile__(					\
81 	"mrs	%0, cpsr		@ stf\n"		\
82 "	bic	%0, %0, #64\n"					\
83 "	msr	cpsr_c, %0"					\
84 	: "=r" (temp)						\
85 	:							\
86 	: "memory", "cc");					\
87 	})
88 
89 /*
90  * Disable FIQs
91  */
92 #define local_fiq_disable()					\
93 	({							\
94 		unsigned long temp;				\
95 	__asm__ __volatile__(					\
96 	"mrs	%0, cpsr		@ clf\n"		\
97 "	orr	%0, %0, #64\n"					\
98 "	msr	cpsr_c, %0"					\
99 	: "=r" (temp)						\
100 	:							\
101 	: "memory", "cc");					\
102 	})
103 
104 #endif
105 
106 /*
107  * Save the current interrupt enable state.
108  */
109 #define raw_local_save_flags(x)					\
110 	({							\
111 	__asm__ __volatile__(					\
112 	"mrs	%0, cpsr		@ local_save_flags"	\
113 	: "=r" (x) : : "memory", "cc");				\
114 	})
115 
116 /*
117  * restore saved IRQ & FIQ state
118  */
119 #define raw_local_irq_restore(x)				\
120 	__asm__ __volatile__(					\
121 	"msr	cpsr_c, %0		@ local_irq_restore\n"	\
122 	:							\
123 	: "r" (x)						\
124 	: "memory", "cc")
125 
126 #define raw_irqs_disabled_flags(flags)	\
127 ({					\
128 	(int)((flags) & PSR_I_BIT);	\
129 })
130 
131 #endif
132 #endif
133