1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
20dc016dbSWang Nan #ifndef __ASM_ARM_INSN_H
30dc016dbSWang Nan #define __ASM_ARM_INSN_H
40dc016dbSWang Nan
5*7b9896c3SArd Biesheuvel #include <linux/types.h>
6*7b9896c3SArd Biesheuvel
7*7b9896c3SArd Biesheuvel /*
8*7b9896c3SArd Biesheuvel * Avoid a literal load by emitting a sequence of ADD/LDR instructions with the
9*7b9896c3SArd Biesheuvel * appropriate relocations. The combined sequence has a range of -/+ 256 MiB,
10*7b9896c3SArd Biesheuvel * which should be sufficient for the core kernel as well as modules loaded
11*7b9896c3SArd Biesheuvel * into the module region. (Not supported by LLD before release 14)
12*7b9896c3SArd Biesheuvel */
13*7b9896c3SArd Biesheuvel #define LOAD_SYM_ARMV6(reg, sym) \
14*7b9896c3SArd Biesheuvel " .globl " #sym " \n\t" \
15*7b9896c3SArd Biesheuvel " .reloc 10f, R_ARM_ALU_PC_G0_NC, " #sym " \n\t" \
16*7b9896c3SArd Biesheuvel " .reloc 11f, R_ARM_ALU_PC_G1_NC, " #sym " \n\t" \
17*7b9896c3SArd Biesheuvel " .reloc 12f, R_ARM_LDR_PC_G2, " #sym " \n\t" \
18*7b9896c3SArd Biesheuvel "10: sub " #reg ", pc, #8 \n\t" \
19*7b9896c3SArd Biesheuvel "11: sub " #reg ", " #reg ", #4 \n\t" \
20*7b9896c3SArd Biesheuvel "12: ldr " #reg ", [" #reg ", #0] \n\t"
21*7b9896c3SArd Biesheuvel
220dc016dbSWang Nan static inline unsigned long
arm_gen_nop(void)230dc016dbSWang Nan arm_gen_nop(void)
240dc016dbSWang Nan {
250dc016dbSWang Nan #ifdef CONFIG_THUMB2_KERNEL
260dc016dbSWang Nan return 0xf3af8000; /* nop.w */
270dc016dbSWang Nan #else
280dc016dbSWang Nan return 0xe1a00000; /* mov r0, r0 */
290dc016dbSWang Nan #endif
300dc016dbSWang Nan }
310dc016dbSWang Nan
320dc016dbSWang Nan unsigned long
33890cb057SAlex Sverdlin __arm_gen_branch(unsigned long pc, unsigned long addr, bool link, bool warn);
340dc016dbSWang Nan
350dc016dbSWang Nan static inline unsigned long
arm_gen_branch(unsigned long pc,unsigned long addr)360dc016dbSWang Nan arm_gen_branch(unsigned long pc, unsigned long addr)
370dc016dbSWang Nan {
38890cb057SAlex Sverdlin return __arm_gen_branch(pc, addr, false, true);
390dc016dbSWang Nan }
400dc016dbSWang Nan
410dc016dbSWang Nan static inline unsigned long
arm_gen_branch_link(unsigned long pc,unsigned long addr,bool warn)42890cb057SAlex Sverdlin arm_gen_branch_link(unsigned long pc, unsigned long addr, bool warn)
430dc016dbSWang Nan {
44890cb057SAlex Sverdlin return __arm_gen_branch(pc, addr, true, warn);
450dc016dbSWang Nan }
460dc016dbSWang Nan
470dc016dbSWang Nan #endif
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