1*0fdebc5eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2573a652fSLennert Buytenhek /* 3573a652fSLennert Buytenhek * arch/arm/include/asm/hardware/cache-tauros2.h 4573a652fSLennert Buytenhek * 5573a652fSLennert Buytenhek * Copyright (C) 2008 Marvell Semiconductor 6573a652fSLennert Buytenhek */ 7573a652fSLennert Buytenhek 838f2e377SChao Xie #define CACHE_TAUROS2_PREFETCH_ON (1 << 0) 938f2e377SChao Xie #define CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1) 1038f2e377SChao Xie 1138f2e377SChao Xie extern void __init tauros2_init(unsigned int features); 12