1# SPDX-License-Identifier: GPL-2.0 2 3menu "Accelerated Cryptographic Algorithms for CPU (arm)" 4 5config CRYPTO_GHASH_ARM_CE 6 tristate "Hash functions: GHASH (PMULL/NEON/ARMv8 Crypto Extensions)" 7 depends on KERNEL_MODE_NEON 8 select CRYPTO_AEAD 9 select CRYPTO_HASH 10 select CRYPTO_CRYPTD 11 select CRYPTO_LIB_AES 12 select CRYPTO_LIB_GF128MUL 13 help 14 GCM GHASH function (NIST SP800-38D) 15 16 Architecture: arm using 17 - PMULL (Polynomial Multiply Long) instructions 18 - NEON (Advanced SIMD) extensions 19 - ARMv8 Crypto Extensions 20 21 Use an implementation of GHASH (used by the GCM AEAD chaining mode) 22 that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64) 23 that is part of the ARMv8 Crypto Extensions, or a slower variant that 24 uses the vmull.p8 instruction that is part of the basic NEON ISA. 25 26config CRYPTO_AES_ARM 27 tristate "Ciphers: AES" 28 select CRYPTO_ALGAPI 29 select CRYPTO_AES 30 help 31 Block ciphers: AES cipher algorithms (FIPS-197) 32 33 Architecture: arm 34 35 On ARM processors without the Crypto Extensions, this is the 36 fastest AES implementation for single blocks. For multiple 37 blocks, the NEON bit-sliced implementation is usually faster. 38 39 This implementation may be vulnerable to cache timing attacks, 40 since it uses lookup tables. However, as countermeasures it 41 disables IRQs and preloads the tables; it is hoped this makes 42 such attacks very difficult. 43 44config CRYPTO_AES_ARM_BS 45 tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (bit-sliced NEON)" 46 depends on KERNEL_MODE_NEON 47 select CRYPTO_AES_ARM 48 select CRYPTO_SKCIPHER 49 select CRYPTO_LIB_AES 50 help 51 Length-preserving ciphers: AES cipher algorithms (FIPS-197) 52 with block cipher modes: 53 - ECB (Electronic Codebook) mode (NIST SP800-38A) 54 - CBC (Cipher Block Chaining) mode (NIST SP800-38A) 55 - CTR (Counter) mode (NIST SP800-38A) 56 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E 57 and IEEE 1619) 58 59 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode 60 and for XTS mode encryption, CBC and XTS mode decryption speedup is 61 around 25%. (CBC encryption speed is not affected by this driver.) 62 63 The bit sliced AES code does not use lookup tables, so it is believed 64 to be invulnerable to cache timing attacks. However, since the bit 65 sliced AES code cannot process single blocks efficiently, in certain 66 cases table-based code with some countermeasures against cache timing 67 attacks will still be used as a fallback method; specifically CBC 68 encryption (not CBC decryption), the encryption of XTS tweaks, XTS 69 ciphertext stealing when the message isn't a multiple of 16 bytes, and 70 CTR when invoked in a context in which NEON instructions are unusable. 71 72config CRYPTO_AES_ARM_CE 73 tristate "Ciphers: AES, modes: ECB/CBC/CTS/CTR/XTS (ARMv8 Crypto Extensions)" 74 depends on KERNEL_MODE_NEON 75 select CRYPTO_SKCIPHER 76 select CRYPTO_LIB_AES 77 help 78 Length-preserving ciphers: AES cipher algorithms (FIPS-197) 79 with block cipher modes: 80 - ECB (Electronic Codebook) mode (NIST SP800-38A) 81 - CBC (Cipher Block Chaining) mode (NIST SP800-38A) 82 - CTR (Counter) mode (NIST SP800-38A) 83 - CTS (Cipher Text Stealing) mode (NIST SP800-38A) 84 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E 85 and IEEE 1619) 86 87 Architecture: arm using: 88 - ARMv8 Crypto Extensions 89 90endmenu 91 92