1 /* 2 * linux/arch/arm/common/sa1111.c 3 * 4 * SA1111 support 5 * 6 * Original code by John Dorsey 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * This file contains all generic SA1111 support. 13 * 14 * All initialization functions provided here are intended to be called 15 * from machine specific code with proper arguments when required. 16 */ 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/irq.h> 20 #include <linux/kernel.h> 21 #include <linux/delay.h> 22 #include <linux/errno.h> 23 #include <linux/ioport.h> 24 #include <linux/platform_device.h> 25 #include <linux/slab.h> 26 #include <linux/spinlock.h> 27 #include <linux/dma-mapping.h> 28 #include <linux/clk.h> 29 #include <linux/io.h> 30 31 #include <mach/hardware.h> 32 #include <asm/mach/irq.h> 33 #include <asm/mach-types.h> 34 #include <asm/sizes.h> 35 36 #include <asm/hardware/sa1111.h> 37 38 /* SA1111 IRQs */ 39 #define IRQ_GPAIN0 (0) 40 #define IRQ_GPAIN1 (1) 41 #define IRQ_GPAIN2 (2) 42 #define IRQ_GPAIN3 (3) 43 #define IRQ_GPBIN0 (4) 44 #define IRQ_GPBIN1 (5) 45 #define IRQ_GPBIN2 (6) 46 #define IRQ_GPBIN3 (7) 47 #define IRQ_GPBIN4 (8) 48 #define IRQ_GPBIN5 (9) 49 #define IRQ_GPCIN0 (10) 50 #define IRQ_GPCIN1 (11) 51 #define IRQ_GPCIN2 (12) 52 #define IRQ_GPCIN3 (13) 53 #define IRQ_GPCIN4 (14) 54 #define IRQ_GPCIN5 (15) 55 #define IRQ_GPCIN6 (16) 56 #define IRQ_GPCIN7 (17) 57 #define IRQ_MSTXINT (18) 58 #define IRQ_MSRXINT (19) 59 #define IRQ_MSSTOPERRINT (20) 60 #define IRQ_TPTXINT (21) 61 #define IRQ_TPRXINT (22) 62 #define IRQ_TPSTOPERRINT (23) 63 #define SSPXMTINT (24) 64 #define SSPRCVINT (25) 65 #define SSPROR (26) 66 #define AUDXMTDMADONEA (32) 67 #define AUDRCVDMADONEA (33) 68 #define AUDXMTDMADONEB (34) 69 #define AUDRCVDMADONEB (35) 70 #define AUDTFSR (36) 71 #define AUDRFSR (37) 72 #define AUDTUR (38) 73 #define AUDROR (39) 74 #define AUDDTS (40) 75 #define AUDRDD (41) 76 #define AUDSTO (42) 77 #define IRQ_USBPWR (43) 78 #define IRQ_HCIM (44) 79 #define IRQ_HCIBUFFACC (45) 80 #define IRQ_HCIRMTWKP (46) 81 #define IRQ_NHCIMFCIR (47) 82 #define IRQ_USB_PORT_RESUME (48) 83 #define IRQ_S0_READY_NINT (49) 84 #define IRQ_S1_READY_NINT (50) 85 #define IRQ_S0_CD_VALID (51) 86 #define IRQ_S1_CD_VALID (52) 87 #define IRQ_S0_BVD1_STSCHG (53) 88 #define IRQ_S1_BVD1_STSCHG (54) 89 #define SA1111_IRQ_NR (55) 90 91 extern void sa1110_mb_enable(void); 92 extern void sa1110_mb_disable(void); 93 94 /* 95 * We keep the following data for the overall SA1111. Note that the 96 * struct device and struct resource are "fake"; they should be supplied 97 * by the bus above us. However, in the interests of getting all SA1111 98 * drivers converted over to the device model, we provide this as an 99 * anchor point for all the other drivers. 100 */ 101 struct sa1111 { 102 struct device *dev; 103 struct clk *clk; 104 unsigned long phys; 105 int irq; 106 int irq_base; /* base for cascaded on-chip IRQs */ 107 spinlock_t lock; 108 void __iomem *base; 109 struct sa1111_platform_data *pdata; 110 #ifdef CONFIG_PM 111 void *saved_state; 112 #endif 113 }; 114 115 /* 116 * We _really_ need to eliminate this. Its only users 117 * are the PWM and DMA checking code. 118 */ 119 static struct sa1111 *g_sa1111; 120 121 struct sa1111_dev_info { 122 unsigned long offset; 123 unsigned long skpcr_mask; 124 bool dma; 125 unsigned int devid; 126 unsigned int irq[6]; 127 }; 128 129 static struct sa1111_dev_info sa1111_devices[] = { 130 { 131 .offset = SA1111_USB, 132 .skpcr_mask = SKPCR_UCLKEN, 133 .dma = true, 134 .devid = SA1111_DEVID_USB, 135 .irq = { 136 IRQ_USBPWR, 137 IRQ_HCIM, 138 IRQ_HCIBUFFACC, 139 IRQ_HCIRMTWKP, 140 IRQ_NHCIMFCIR, 141 IRQ_USB_PORT_RESUME 142 }, 143 }, 144 { 145 .offset = 0x0600, 146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN, 147 .dma = true, 148 .devid = SA1111_DEVID_SAC, 149 .irq = { 150 AUDXMTDMADONEA, 151 AUDXMTDMADONEB, 152 AUDRCVDMADONEA, 153 AUDRCVDMADONEB 154 }, 155 }, 156 { 157 .offset = 0x0800, 158 .skpcr_mask = SKPCR_SCLKEN, 159 .devid = SA1111_DEVID_SSP, 160 }, 161 { 162 .offset = SA1111_KBD, 163 .skpcr_mask = SKPCR_PTCLKEN, 164 .devid = SA1111_DEVID_PS2_KBD, 165 .irq = { 166 IRQ_TPRXINT, 167 IRQ_TPTXINT 168 }, 169 }, 170 { 171 .offset = SA1111_MSE, 172 .skpcr_mask = SKPCR_PMCLKEN, 173 .devid = SA1111_DEVID_PS2_MSE, 174 .irq = { 175 IRQ_MSRXINT, 176 IRQ_MSTXINT 177 }, 178 }, 179 { 180 .offset = 0x1800, 181 .skpcr_mask = 0, 182 .devid = SA1111_DEVID_PCMCIA, 183 .irq = { 184 IRQ_S0_READY_NINT, 185 IRQ_S0_CD_VALID, 186 IRQ_S0_BVD1_STSCHG, 187 IRQ_S1_READY_NINT, 188 IRQ_S1_CD_VALID, 189 IRQ_S1_BVD1_STSCHG, 190 }, 191 }, 192 }; 193 194 /* 195 * SA1111 interrupt support. Since clearing an IRQ while there are 196 * active IRQs causes the interrupt output to pulse, the upper levels 197 * will call us again if there are more interrupts to process. 198 */ 199 static void sa1111_irq_handler(struct irq_desc *desc) 200 { 201 unsigned int stat0, stat1, i; 202 struct sa1111 *sachip = irq_desc_get_handler_data(desc); 203 void __iomem *mapbase = sachip->base + SA1111_INTC; 204 205 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); 206 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1); 207 208 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); 209 210 desc->irq_data.chip->irq_ack(&desc->irq_data); 211 212 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); 213 214 if (stat0 == 0 && stat1 == 0) { 215 do_bad_IRQ(desc); 216 return; 217 } 218 219 for (i = 0; stat0; i++, stat0 >>= 1) 220 if (stat0 & 1) 221 generic_handle_irq(i + sachip->irq_base); 222 223 for (i = 32; stat1; i++, stat1 >>= 1) 224 if (stat1 & 1) 225 generic_handle_irq(i + sachip->irq_base); 226 227 /* For level-based interrupts */ 228 desc->irq_data.chip->irq_unmask(&desc->irq_data); 229 } 230 231 #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) 232 #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) 233 234 static void sa1111_ack_irq(struct irq_data *d) 235 { 236 } 237 238 static void sa1111_mask_lowirq(struct irq_data *d) 239 { 240 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 241 void __iomem *mapbase = sachip->base + SA1111_INTC; 242 unsigned long ie0; 243 244 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 245 ie0 &= ~SA1111_IRQMASK_LO(d->irq); 246 writel(ie0, mapbase + SA1111_INTEN0); 247 } 248 249 static void sa1111_unmask_lowirq(struct irq_data *d) 250 { 251 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 252 void __iomem *mapbase = sachip->base + SA1111_INTC; 253 unsigned long ie0; 254 255 ie0 = sa1111_readl(mapbase + SA1111_INTEN0); 256 ie0 |= SA1111_IRQMASK_LO(d->irq); 257 sa1111_writel(ie0, mapbase + SA1111_INTEN0); 258 } 259 260 /* 261 * Attempt to re-trigger the interrupt. The SA1111 contains a register 262 * (INTSET) which claims to do this. However, in practice no amount of 263 * manipulation of INTEN and INTSET guarantees that the interrupt will 264 * be triggered. In fact, its very difficult, if not impossible to get 265 * INTSET to re-trigger the interrupt. 266 */ 267 static int sa1111_retrigger_lowirq(struct irq_data *d) 268 { 269 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 270 void __iomem *mapbase = sachip->base + SA1111_INTC; 271 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 272 unsigned long ip0; 273 int i; 274 275 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 276 for (i = 0; i < 8; i++) { 277 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); 278 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 279 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask) 280 break; 281 } 282 283 if (i == 8) 284 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n", 285 d->irq); 286 return i == 8 ? -1 : 0; 287 } 288 289 static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags) 290 { 291 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 292 void __iomem *mapbase = sachip->base + SA1111_INTC; 293 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 294 unsigned long ip0; 295 296 if (flags == IRQ_TYPE_PROBE) 297 return 0; 298 299 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 300 return -EINVAL; 301 302 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); 303 if (flags & IRQ_TYPE_EDGE_RISING) 304 ip0 &= ~mask; 305 else 306 ip0 |= mask; 307 sa1111_writel(ip0, mapbase + SA1111_INTPOL0); 308 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0); 309 310 return 0; 311 } 312 313 static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on) 314 { 315 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 316 void __iomem *mapbase = sachip->base + SA1111_INTC; 317 unsigned int mask = SA1111_IRQMASK_LO(d->irq); 318 unsigned long we0; 319 320 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); 321 if (on) 322 we0 |= mask; 323 else 324 we0 &= ~mask; 325 sa1111_writel(we0, mapbase + SA1111_WAKEEN0); 326 327 return 0; 328 } 329 330 static struct irq_chip sa1111_low_chip = { 331 .name = "SA1111-l", 332 .irq_ack = sa1111_ack_irq, 333 .irq_mask = sa1111_mask_lowirq, 334 .irq_unmask = sa1111_unmask_lowirq, 335 .irq_retrigger = sa1111_retrigger_lowirq, 336 .irq_set_type = sa1111_type_lowirq, 337 .irq_set_wake = sa1111_wake_lowirq, 338 }; 339 340 static void sa1111_mask_highirq(struct irq_data *d) 341 { 342 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 343 void __iomem *mapbase = sachip->base + SA1111_INTC; 344 unsigned long ie1; 345 346 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 347 ie1 &= ~SA1111_IRQMASK_HI(d->irq); 348 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 349 } 350 351 static void sa1111_unmask_highirq(struct irq_data *d) 352 { 353 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 354 void __iomem *mapbase = sachip->base + SA1111_INTC; 355 unsigned long ie1; 356 357 ie1 = sa1111_readl(mapbase + SA1111_INTEN1); 358 ie1 |= SA1111_IRQMASK_HI(d->irq); 359 sa1111_writel(ie1, mapbase + SA1111_INTEN1); 360 } 361 362 /* 363 * Attempt to re-trigger the interrupt. The SA1111 contains a register 364 * (INTSET) which claims to do this. However, in practice no amount of 365 * manipulation of INTEN and INTSET guarantees that the interrupt will 366 * be triggered. In fact, its very difficult, if not impossible to get 367 * INTSET to re-trigger the interrupt. 368 */ 369 static int sa1111_retrigger_highirq(struct irq_data *d) 370 { 371 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 372 void __iomem *mapbase = sachip->base + SA1111_INTC; 373 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 374 unsigned long ip1; 375 int i; 376 377 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 378 for (i = 0; i < 8; i++) { 379 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1); 380 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 381 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) 382 break; 383 } 384 385 if (i == 8) 386 pr_err("Danger Will Robinson: failed to re-trigger IRQ%d\n", 387 d->irq); 388 return i == 8 ? -1 : 0; 389 } 390 391 static int sa1111_type_highirq(struct irq_data *d, unsigned int flags) 392 { 393 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 394 void __iomem *mapbase = sachip->base + SA1111_INTC; 395 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 396 unsigned long ip1; 397 398 if (flags == IRQ_TYPE_PROBE) 399 return 0; 400 401 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) 402 return -EINVAL; 403 404 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); 405 if (flags & IRQ_TYPE_EDGE_RISING) 406 ip1 &= ~mask; 407 else 408 ip1 |= mask; 409 sa1111_writel(ip1, mapbase + SA1111_INTPOL1); 410 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1); 411 412 return 0; 413 } 414 415 static int sa1111_wake_highirq(struct irq_data *d, unsigned int on) 416 { 417 struct sa1111 *sachip = irq_data_get_irq_chip_data(d); 418 void __iomem *mapbase = sachip->base + SA1111_INTC; 419 unsigned int mask = SA1111_IRQMASK_HI(d->irq); 420 unsigned long we1; 421 422 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); 423 if (on) 424 we1 |= mask; 425 else 426 we1 &= ~mask; 427 sa1111_writel(we1, mapbase + SA1111_WAKEEN1); 428 429 return 0; 430 } 431 432 static struct irq_chip sa1111_high_chip = { 433 .name = "SA1111-h", 434 .irq_ack = sa1111_ack_irq, 435 .irq_mask = sa1111_mask_highirq, 436 .irq_unmask = sa1111_unmask_highirq, 437 .irq_retrigger = sa1111_retrigger_highirq, 438 .irq_set_type = sa1111_type_highirq, 439 .irq_set_wake = sa1111_wake_highirq, 440 }; 441 442 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base) 443 { 444 void __iomem *irqbase = sachip->base + SA1111_INTC; 445 unsigned i, irq; 446 int ret; 447 448 /* 449 * We're guaranteed that this region hasn't been taken. 450 */ 451 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq"); 452 453 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1); 454 if (ret <= 0) { 455 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n", 456 SA1111_IRQ_NR, ret); 457 if (ret == 0) 458 ret = -EINVAL; 459 return ret; 460 } 461 462 sachip->irq_base = ret; 463 464 /* disable all IRQs */ 465 sa1111_writel(0, irqbase + SA1111_INTEN0); 466 sa1111_writel(0, irqbase + SA1111_INTEN1); 467 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 468 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 469 470 /* 471 * detect on rising edge. Note: Feb 2001 Errata for SA1111 472 * specifies that S0ReadyInt and S1ReadyInt should be '1'. 473 */ 474 sa1111_writel(0, irqbase + SA1111_INTPOL0); 475 sa1111_writel(BIT(IRQ_S0_READY_NINT & 31) | 476 BIT(IRQ_S1_READY_NINT & 31), 477 irqbase + SA1111_INTPOL1); 478 479 /* clear all IRQs */ 480 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0); 481 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); 482 483 for (i = IRQ_GPAIN0; i <= SSPROR; i++) { 484 irq = sachip->irq_base + i; 485 irq_set_chip_and_handler(irq, &sa1111_low_chip, 486 handle_edge_irq); 487 irq_set_chip_data(irq, sachip); 488 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); 489 } 490 491 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) { 492 irq = sachip->irq_base + i; 493 irq_set_chip_and_handler(irq, &sa1111_high_chip, 494 handle_edge_irq); 495 irq_set_chip_data(irq, sachip); 496 irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); 497 } 498 499 /* 500 * Register SA1111 interrupt 501 */ 502 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); 503 irq_set_chained_handler_and_data(sachip->irq, sa1111_irq_handler, 504 sachip); 505 506 dev_info(sachip->dev, "Providing IRQ%u-%u\n", 507 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1); 508 509 return 0; 510 } 511 512 /* 513 * Bring the SA1111 out of reset. This requires a set procedure: 514 * 1. nRESET asserted (by hardware) 515 * 2. CLK turned on from SA1110 516 * 3. nRESET deasserted 517 * 4. VCO turned on, PLL_BYPASS turned off 518 * 5. Wait lock time, then assert RCLKEn 519 * 7. PCR set to allow clocking of individual functions 520 * 521 * Until we've done this, the only registers we can access are: 522 * SBI_SKCR 523 * SBI_SMCR 524 * SBI_SKID 525 */ 526 static void sa1111_wake(struct sa1111 *sachip) 527 { 528 unsigned long flags, r; 529 530 spin_lock_irqsave(&sachip->lock, flags); 531 532 clk_enable(sachip->clk); 533 534 /* 535 * Turn VCO on, and disable PLL Bypass. 536 */ 537 r = sa1111_readl(sachip->base + SA1111_SKCR); 538 r &= ~SKCR_VCO_OFF; 539 sa1111_writel(r, sachip->base + SA1111_SKCR); 540 r |= SKCR_PLL_BYPASS | SKCR_OE_EN; 541 sa1111_writel(r, sachip->base + SA1111_SKCR); 542 543 /* 544 * Wait lock time. SA1111 manual _doesn't_ 545 * specify a figure for this! We choose 100us. 546 */ 547 udelay(100); 548 549 /* 550 * Enable RCLK. We also ensure that RDYEN is set. 551 */ 552 r |= SKCR_RCLKEN | SKCR_RDYEN; 553 sa1111_writel(r, sachip->base + SA1111_SKCR); 554 555 /* 556 * Wait 14 RCLK cycles for the chip to finish coming out 557 * of reset. (RCLK=24MHz). This is 590ns. 558 */ 559 udelay(1); 560 561 /* 562 * Ensure all clocks are initially off. 563 */ 564 sa1111_writel(0, sachip->base + SA1111_SKPCR); 565 566 spin_unlock_irqrestore(&sachip->lock, flags); 567 } 568 569 #ifdef CONFIG_ARCH_SA1100 570 571 static u32 sa1111_dma_mask[] = { 572 ~0, 573 ~(1 << 20), 574 ~(1 << 23), 575 ~(1 << 24), 576 ~(1 << 25), 577 ~(1 << 20), 578 ~(1 << 20), 579 0, 580 }; 581 582 /* 583 * Configure the SA1111 shared memory controller. 584 */ 585 void 586 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac, 587 unsigned int cas_latency) 588 { 589 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC); 590 591 if (cas_latency == 3) 592 smcr |= SMCR_CLAT; 593 594 sa1111_writel(smcr, sachip->base + SA1111_SMCR); 595 596 /* 597 * Now clear the bits in the DMA mask to work around the SA1111 598 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion 599 * Chip Specification Update, June 2000, Erratum #7). 600 */ 601 if (sachip->dev->dma_mask) 602 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2]; 603 604 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2]; 605 } 606 #endif 607 608 static void sa1111_dev_release(struct device *_dev) 609 { 610 struct sa1111_dev *dev = SA1111_DEV(_dev); 611 612 kfree(dev); 613 } 614 615 static int 616 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, 617 struct sa1111_dev_info *info) 618 { 619 struct sa1111_dev *dev; 620 unsigned i; 621 int ret; 622 623 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL); 624 if (!dev) { 625 ret = -ENOMEM; 626 goto err_alloc; 627 } 628 629 device_initialize(&dev->dev); 630 dev_set_name(&dev->dev, "%4.4lx", info->offset); 631 dev->devid = info->devid; 632 dev->dev.parent = sachip->dev; 633 dev->dev.bus = &sa1111_bus_type; 634 dev->dev.release = sa1111_dev_release; 635 dev->res.start = sachip->phys + info->offset; 636 dev->res.end = dev->res.start + 511; 637 dev->res.name = dev_name(&dev->dev); 638 dev->res.flags = IORESOURCE_MEM; 639 dev->mapbase = sachip->base + info->offset; 640 dev->skpcr_mask = info->skpcr_mask; 641 642 for (i = 0; i < ARRAY_SIZE(info->irq); i++) 643 dev->irq[i] = sachip->irq_base + info->irq[i]; 644 645 /* 646 * If the parent device has a DMA mask associated with it, and 647 * this child supports DMA, propagate it down to the children. 648 */ 649 if (info->dma && sachip->dev->dma_mask) { 650 dev->dma_mask = *sachip->dev->dma_mask; 651 dev->dev.dma_mask = &dev->dma_mask; 652 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; 653 } 654 655 ret = request_resource(parent, &dev->res); 656 if (ret) { 657 dev_err(sachip->dev, "failed to allocate resource for %s\n", 658 dev->res.name); 659 goto err_resource; 660 } 661 662 ret = device_add(&dev->dev); 663 if (ret) 664 goto err_add; 665 return 0; 666 667 err_add: 668 release_resource(&dev->res); 669 err_resource: 670 put_device(&dev->dev); 671 err_alloc: 672 return ret; 673 } 674 675 /** 676 * sa1111_probe - probe for a single SA1111 chip. 677 * @phys_addr: physical address of device. 678 * 679 * Probe for a SA1111 chip. This must be called 680 * before any other SA1111-specific code. 681 * 682 * Returns: 683 * %-ENODEV device not found. 684 * %-EBUSY physical address already marked in-use. 685 * %-EINVAL no platform data passed 686 * %0 successful. 687 */ 688 static int __sa1111_probe(struct device *me, struct resource *mem, int irq) 689 { 690 struct sa1111_platform_data *pd = me->platform_data; 691 struct sa1111 *sachip; 692 unsigned long id; 693 unsigned int has_devs; 694 int i, ret = -ENODEV; 695 696 if (!pd) 697 return -EINVAL; 698 699 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); 700 if (!sachip) 701 return -ENOMEM; 702 703 sachip->clk = clk_get(me, "SA1111_CLK"); 704 if (IS_ERR(sachip->clk)) { 705 ret = PTR_ERR(sachip->clk); 706 goto err_free; 707 } 708 709 ret = clk_prepare(sachip->clk); 710 if (ret) 711 goto err_clkput; 712 713 spin_lock_init(&sachip->lock); 714 715 sachip->dev = me; 716 dev_set_drvdata(sachip->dev, sachip); 717 718 sachip->pdata = pd; 719 sachip->phys = mem->start; 720 sachip->irq = irq; 721 722 /* 723 * Map the whole region. This also maps the 724 * registers for our children. 725 */ 726 sachip->base = ioremap(mem->start, PAGE_SIZE * 2); 727 if (!sachip->base) { 728 ret = -ENOMEM; 729 goto err_clk_unprep; 730 } 731 732 /* 733 * Probe for the chip. Only touch the SBI registers. 734 */ 735 id = sa1111_readl(sachip->base + SA1111_SKID); 736 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 737 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id); 738 ret = -ENODEV; 739 goto err_unmap; 740 } 741 742 pr_info("SA1111 Microprocessor Companion Chip: silicon revision %lx, metal revision %lx\n", 743 (id & SKID_SIREV_MASK) >> 4, id & SKID_MTREV_MASK); 744 745 /* 746 * We found it. Wake the chip up, and initialise. 747 */ 748 sa1111_wake(sachip); 749 750 /* 751 * The interrupt controller must be initialised before any 752 * other device to ensure that the interrupts are available. 753 */ 754 if (sachip->irq != NO_IRQ) { 755 ret = sa1111_setup_irq(sachip, pd->irq_base); 756 if (ret) 757 goto err_clk; 758 } 759 760 #ifdef CONFIG_ARCH_SA1100 761 { 762 unsigned int val; 763 764 /* 765 * The SDRAM configuration of the SA1110 and the SA1111 must 766 * match. This is very important to ensure that SA1111 accesses 767 * don't corrupt the SDRAM. Note that this ungates the SA1111's 768 * MBGNT signal, so we must have called sa1110_mb_disable() 769 * beforehand. 770 */ 771 sa1111_configure_smc(sachip, 1, 772 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), 773 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); 774 775 /* 776 * We only need to turn on DCLK whenever we want to use the 777 * DMA. It can otherwise be held firmly in the off position. 778 * (currently, we always enable it.) 779 */ 780 val = sa1111_readl(sachip->base + SA1111_SKPCR); 781 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR); 782 783 /* 784 * Enable the SA1110 memory bus request and grant signals. 785 */ 786 sa1110_mb_enable(); 787 } 788 #endif 789 790 g_sa1111 = sachip; 791 792 has_devs = ~0; 793 if (pd) 794 has_devs &= ~pd->disable_devs; 795 796 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++) 797 if (sa1111_devices[i].devid & has_devs) 798 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]); 799 800 return 0; 801 802 err_clk: 803 clk_disable(sachip->clk); 804 err_unmap: 805 iounmap(sachip->base); 806 err_clk_unprep: 807 clk_unprepare(sachip->clk); 808 err_clkput: 809 clk_put(sachip->clk); 810 err_free: 811 kfree(sachip); 812 return ret; 813 } 814 815 static int sa1111_remove_one(struct device *dev, void *data) 816 { 817 struct sa1111_dev *sadev = SA1111_DEV(dev); 818 device_del(&sadev->dev); 819 release_resource(&sadev->res); 820 put_device(&sadev->dev); 821 return 0; 822 } 823 824 static void __sa1111_remove(struct sa1111 *sachip) 825 { 826 void __iomem *irqbase = sachip->base + SA1111_INTC; 827 828 device_for_each_child(sachip->dev, NULL, sa1111_remove_one); 829 830 /* disable all IRQs */ 831 sa1111_writel(0, irqbase + SA1111_INTEN0); 832 sa1111_writel(0, irqbase + SA1111_INTEN1); 833 sa1111_writel(0, irqbase + SA1111_WAKEEN0); 834 sa1111_writel(0, irqbase + SA1111_WAKEEN1); 835 836 clk_disable(sachip->clk); 837 clk_unprepare(sachip->clk); 838 839 if (sachip->irq != NO_IRQ) { 840 irq_set_chained_handler_and_data(sachip->irq, NULL, NULL); 841 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); 842 843 release_mem_region(sachip->phys + SA1111_INTC, 512); 844 } 845 846 iounmap(sachip->base); 847 clk_put(sachip->clk); 848 kfree(sachip); 849 } 850 851 struct sa1111_save_data { 852 unsigned int skcr; 853 unsigned int skpcr; 854 unsigned int skcdr; 855 unsigned char skaud; 856 unsigned char skpwm0; 857 unsigned char skpwm1; 858 859 /* 860 * Interrupt controller 861 */ 862 unsigned int intpol0; 863 unsigned int intpol1; 864 unsigned int inten0; 865 unsigned int inten1; 866 unsigned int wakepol0; 867 unsigned int wakepol1; 868 unsigned int wakeen0; 869 unsigned int wakeen1; 870 }; 871 872 #ifdef CONFIG_PM 873 874 static int sa1111_suspend_noirq(struct device *dev) 875 { 876 struct sa1111 *sachip = dev_get_drvdata(dev); 877 struct sa1111_save_data *save; 878 unsigned long flags; 879 unsigned int val; 880 void __iomem *base; 881 882 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL); 883 if (!save) 884 return -ENOMEM; 885 sachip->saved_state = save; 886 887 spin_lock_irqsave(&sachip->lock, flags); 888 889 /* 890 * Save state. 891 */ 892 base = sachip->base; 893 save->skcr = sa1111_readl(base + SA1111_SKCR); 894 save->skpcr = sa1111_readl(base + SA1111_SKPCR); 895 save->skcdr = sa1111_readl(base + SA1111_SKCDR); 896 save->skaud = sa1111_readl(base + SA1111_SKAUD); 897 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0); 898 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1); 899 900 sa1111_writel(0, sachip->base + SA1111_SKPWM0); 901 sa1111_writel(0, sachip->base + SA1111_SKPWM1); 902 903 base = sachip->base + SA1111_INTC; 904 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0); 905 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1); 906 save->inten0 = sa1111_readl(base + SA1111_INTEN0); 907 save->inten1 = sa1111_readl(base + SA1111_INTEN1); 908 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0); 909 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1); 910 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0); 911 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1); 912 913 /* 914 * Disable. 915 */ 916 val = sa1111_readl(sachip->base + SA1111_SKCR); 917 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR); 918 919 clk_disable(sachip->clk); 920 921 spin_unlock_irqrestore(&sachip->lock, flags); 922 923 #ifdef CONFIG_ARCH_SA1100 924 sa1110_mb_disable(); 925 #endif 926 927 return 0; 928 } 929 930 /* 931 * sa1111_resume - Restore the SA1111 device state. 932 * @dev: device to restore 933 * 934 * Restore the general state of the SA1111; clock control and 935 * interrupt controller. Other parts of the SA1111 must be 936 * restored by their respective drivers, and must be called 937 * via LDM after this function. 938 */ 939 static int sa1111_resume_noirq(struct device *dev) 940 { 941 struct sa1111 *sachip = dev_get_drvdata(dev); 942 struct sa1111_save_data *save; 943 unsigned long flags, id; 944 void __iomem *base; 945 946 save = sachip->saved_state; 947 if (!save) 948 return 0; 949 950 /* 951 * Ensure that the SA1111 is still here. 952 * FIXME: shouldn't do this here. 953 */ 954 id = sa1111_readl(sachip->base + SA1111_SKID); 955 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) { 956 __sa1111_remove(sachip); 957 dev_set_drvdata(dev, NULL); 958 kfree(save); 959 return 0; 960 } 961 962 /* 963 * First of all, wake up the chip. 964 */ 965 sa1111_wake(sachip); 966 967 #ifdef CONFIG_ARCH_SA1100 968 /* Enable the memory bus request/grant signals */ 969 sa1110_mb_enable(); 970 #endif 971 972 /* 973 * Only lock for write ops. Also, sa1111_wake must be called with 974 * released spinlock! 975 */ 976 spin_lock_irqsave(&sachip->lock, flags); 977 978 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0); 979 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1); 980 981 base = sachip->base; 982 sa1111_writel(save->skcr, base + SA1111_SKCR); 983 sa1111_writel(save->skpcr, base + SA1111_SKPCR); 984 sa1111_writel(save->skcdr, base + SA1111_SKCDR); 985 sa1111_writel(save->skaud, base + SA1111_SKAUD); 986 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0); 987 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1); 988 989 base = sachip->base + SA1111_INTC; 990 sa1111_writel(save->intpol0, base + SA1111_INTPOL0); 991 sa1111_writel(save->intpol1, base + SA1111_INTPOL1); 992 sa1111_writel(save->inten0, base + SA1111_INTEN0); 993 sa1111_writel(save->inten1, base + SA1111_INTEN1); 994 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0); 995 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1); 996 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0); 997 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1); 998 999 spin_unlock_irqrestore(&sachip->lock, flags); 1000 1001 sachip->saved_state = NULL; 1002 kfree(save); 1003 1004 return 0; 1005 } 1006 1007 #else 1008 #define sa1111_suspend_noirq NULL 1009 #define sa1111_resume_noirq NULL 1010 #endif 1011 1012 static int sa1111_probe(struct platform_device *pdev) 1013 { 1014 struct resource *mem; 1015 int irq; 1016 1017 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1018 if (!mem) 1019 return -EINVAL; 1020 irq = platform_get_irq(pdev, 0); 1021 if (irq < 0) 1022 return irq; 1023 1024 return __sa1111_probe(&pdev->dev, mem, irq); 1025 } 1026 1027 static int sa1111_remove(struct platform_device *pdev) 1028 { 1029 struct sa1111 *sachip = platform_get_drvdata(pdev); 1030 1031 if (sachip) { 1032 #ifdef CONFIG_PM 1033 kfree(sachip->saved_state); 1034 sachip->saved_state = NULL; 1035 #endif 1036 __sa1111_remove(sachip); 1037 platform_set_drvdata(pdev, NULL); 1038 } 1039 1040 return 0; 1041 } 1042 1043 static struct dev_pm_ops sa1111_pm_ops = { 1044 .suspend_noirq = sa1111_suspend_noirq, 1045 .resume_noirq = sa1111_resume_noirq, 1046 }; 1047 1048 /* 1049 * Not sure if this should be on the system bus or not yet. 1050 * We really want some way to register a system device at 1051 * the per-machine level, and then have this driver pick 1052 * up the registered devices. 1053 * 1054 * We also need to handle the SDRAM configuration for 1055 * PXA250/SA1110 machine classes. 1056 */ 1057 static struct platform_driver sa1111_device_driver = { 1058 .probe = sa1111_probe, 1059 .remove = sa1111_remove, 1060 .driver = { 1061 .name = "sa1111", 1062 .pm = &sa1111_pm_ops, 1063 }, 1064 }; 1065 1066 /* 1067 * Get the parent device driver (us) structure 1068 * from a child function device 1069 */ 1070 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev) 1071 { 1072 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent); 1073 } 1074 1075 /* 1076 * The bits in the opdiv field are non-linear. 1077 */ 1078 static unsigned char opdiv_table[] = { 1, 4, 2, 8 }; 1079 1080 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip) 1081 { 1082 unsigned int skcdr, fbdiv, ipdiv, opdiv; 1083 1084 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR); 1085 1086 fbdiv = (skcdr & 0x007f) + 2; 1087 ipdiv = ((skcdr & 0x0f80) >> 7) + 2; 1088 opdiv = opdiv_table[(skcdr & 0x3000) >> 12]; 1089 1090 return 3686400 * fbdiv / (ipdiv * opdiv); 1091 } 1092 1093 /** 1094 * sa1111_pll_clock - return the current PLL clock frequency. 1095 * @sadev: SA1111 function block 1096 * 1097 * BUG: we should look at SKCR. We also blindly believe that 1098 * the chip is being fed with the 3.6864MHz clock. 1099 * 1100 * Returns the PLL clock in Hz. 1101 */ 1102 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev) 1103 { 1104 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1105 1106 return __sa1111_pll_clock(sachip); 1107 } 1108 EXPORT_SYMBOL(sa1111_pll_clock); 1109 1110 /** 1111 * sa1111_select_audio_mode - select I2S or AC link mode 1112 * @sadev: SA1111 function block 1113 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S 1114 * 1115 * Frob the SKCR to select AC Link mode or I2S mode for 1116 * the audio block. 1117 */ 1118 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode) 1119 { 1120 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1121 unsigned long flags; 1122 unsigned int val; 1123 1124 spin_lock_irqsave(&sachip->lock, flags); 1125 1126 val = sa1111_readl(sachip->base + SA1111_SKCR); 1127 if (mode == SA1111_AUDIO_I2S) { 1128 val &= ~SKCR_SELAC; 1129 } else { 1130 val |= SKCR_SELAC; 1131 } 1132 sa1111_writel(val, sachip->base + SA1111_SKCR); 1133 1134 spin_unlock_irqrestore(&sachip->lock, flags); 1135 } 1136 EXPORT_SYMBOL(sa1111_select_audio_mode); 1137 1138 /** 1139 * sa1111_set_audio_rate - set the audio sample rate 1140 * @sadev: SA1111 SAC function block 1141 * @rate: sample rate to select 1142 */ 1143 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate) 1144 { 1145 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1146 unsigned int div; 1147 1148 if (sadev->devid != SA1111_DEVID_SAC) 1149 return -EINVAL; 1150 1151 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate; 1152 if (div == 0) 1153 div = 1; 1154 if (div > 128) 1155 div = 128; 1156 1157 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD); 1158 1159 return 0; 1160 } 1161 EXPORT_SYMBOL(sa1111_set_audio_rate); 1162 1163 /** 1164 * sa1111_get_audio_rate - get the audio sample rate 1165 * @sadev: SA1111 SAC function block device 1166 */ 1167 int sa1111_get_audio_rate(struct sa1111_dev *sadev) 1168 { 1169 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1170 unsigned long div; 1171 1172 if (sadev->devid != SA1111_DEVID_SAC) 1173 return -EINVAL; 1174 1175 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1; 1176 1177 return __sa1111_pll_clock(sachip) / (256 * div); 1178 } 1179 EXPORT_SYMBOL(sa1111_get_audio_rate); 1180 1181 void sa1111_set_io_dir(struct sa1111_dev *sadev, 1182 unsigned int bits, unsigned int dir, 1183 unsigned int sleep_dir) 1184 { 1185 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1186 unsigned long flags; 1187 unsigned int val; 1188 void __iomem *gpio = sachip->base + SA1111_GPIO; 1189 1190 #define MODIFY_BITS(port, mask, dir) \ 1191 if (mask) { \ 1192 val = sa1111_readl(port); \ 1193 val &= ~(mask); \ 1194 val |= (dir) & (mask); \ 1195 sa1111_writel(val, port); \ 1196 } 1197 1198 spin_lock_irqsave(&sachip->lock, flags); 1199 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir); 1200 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8); 1201 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16); 1202 1203 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir); 1204 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8); 1205 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16); 1206 spin_unlock_irqrestore(&sachip->lock, flags); 1207 } 1208 EXPORT_SYMBOL(sa1111_set_io_dir); 1209 1210 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1211 { 1212 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1213 unsigned long flags; 1214 unsigned int val; 1215 void __iomem *gpio = sachip->base + SA1111_GPIO; 1216 1217 spin_lock_irqsave(&sachip->lock, flags); 1218 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v); 1219 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8); 1220 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16); 1221 spin_unlock_irqrestore(&sachip->lock, flags); 1222 } 1223 EXPORT_SYMBOL(sa1111_set_io); 1224 1225 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v) 1226 { 1227 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1228 unsigned long flags; 1229 unsigned int val; 1230 void __iomem *gpio = sachip->base + SA1111_GPIO; 1231 1232 spin_lock_irqsave(&sachip->lock, flags); 1233 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v); 1234 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8); 1235 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16); 1236 spin_unlock_irqrestore(&sachip->lock, flags); 1237 } 1238 EXPORT_SYMBOL(sa1111_set_sleep_io); 1239 1240 /* 1241 * Individual device operations. 1242 */ 1243 1244 /** 1245 * sa1111_enable_device - enable an on-chip SA1111 function block 1246 * @sadev: SA1111 function block device to enable 1247 */ 1248 int sa1111_enable_device(struct sa1111_dev *sadev) 1249 { 1250 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1251 unsigned long flags; 1252 unsigned int val; 1253 int ret = 0; 1254 1255 if (sachip->pdata && sachip->pdata->enable) 1256 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid); 1257 1258 if (ret == 0) { 1259 spin_lock_irqsave(&sachip->lock, flags); 1260 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1261 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1262 spin_unlock_irqrestore(&sachip->lock, flags); 1263 } 1264 return ret; 1265 } 1266 EXPORT_SYMBOL(sa1111_enable_device); 1267 1268 /** 1269 * sa1111_disable_device - disable an on-chip SA1111 function block 1270 * @sadev: SA1111 function block device to disable 1271 */ 1272 void sa1111_disable_device(struct sa1111_dev *sadev) 1273 { 1274 struct sa1111 *sachip = sa1111_chip_driver(sadev); 1275 unsigned long flags; 1276 unsigned int val; 1277 1278 spin_lock_irqsave(&sachip->lock, flags); 1279 val = sa1111_readl(sachip->base + SA1111_SKPCR); 1280 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR); 1281 spin_unlock_irqrestore(&sachip->lock, flags); 1282 1283 if (sachip->pdata && sachip->pdata->disable) 1284 sachip->pdata->disable(sachip->pdata->data, sadev->devid); 1285 } 1286 EXPORT_SYMBOL(sa1111_disable_device); 1287 1288 /* 1289 * SA1111 "Register Access Bus." 1290 * 1291 * We model this as a regular bus type, and hang devices directly 1292 * off this. 1293 */ 1294 static int sa1111_match(struct device *_dev, struct device_driver *_drv) 1295 { 1296 struct sa1111_dev *dev = SA1111_DEV(_dev); 1297 struct sa1111_driver *drv = SA1111_DRV(_drv); 1298 1299 return !!(dev->devid & drv->devid); 1300 } 1301 1302 static int sa1111_bus_suspend(struct device *dev, pm_message_t state) 1303 { 1304 struct sa1111_dev *sadev = SA1111_DEV(dev); 1305 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1306 int ret = 0; 1307 1308 if (drv && drv->suspend) 1309 ret = drv->suspend(sadev, state); 1310 return ret; 1311 } 1312 1313 static int sa1111_bus_resume(struct device *dev) 1314 { 1315 struct sa1111_dev *sadev = SA1111_DEV(dev); 1316 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1317 int ret = 0; 1318 1319 if (drv && drv->resume) 1320 ret = drv->resume(sadev); 1321 return ret; 1322 } 1323 1324 static void sa1111_bus_shutdown(struct device *dev) 1325 { 1326 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1327 1328 if (drv && drv->shutdown) 1329 drv->shutdown(SA1111_DEV(dev)); 1330 } 1331 1332 static int sa1111_bus_probe(struct device *dev) 1333 { 1334 struct sa1111_dev *sadev = SA1111_DEV(dev); 1335 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1336 int ret = -ENODEV; 1337 1338 if (drv->probe) 1339 ret = drv->probe(sadev); 1340 return ret; 1341 } 1342 1343 static int sa1111_bus_remove(struct device *dev) 1344 { 1345 struct sa1111_dev *sadev = SA1111_DEV(dev); 1346 struct sa1111_driver *drv = SA1111_DRV(dev->driver); 1347 int ret = 0; 1348 1349 if (drv->remove) 1350 ret = drv->remove(sadev); 1351 return ret; 1352 } 1353 1354 struct bus_type sa1111_bus_type = { 1355 .name = "sa1111-rab", 1356 .match = sa1111_match, 1357 .probe = sa1111_bus_probe, 1358 .remove = sa1111_bus_remove, 1359 .suspend = sa1111_bus_suspend, 1360 .resume = sa1111_bus_resume, 1361 .shutdown = sa1111_bus_shutdown, 1362 }; 1363 EXPORT_SYMBOL(sa1111_bus_type); 1364 1365 int sa1111_driver_register(struct sa1111_driver *driver) 1366 { 1367 driver->drv.bus = &sa1111_bus_type; 1368 return driver_register(&driver->drv); 1369 } 1370 EXPORT_SYMBOL(sa1111_driver_register); 1371 1372 void sa1111_driver_unregister(struct sa1111_driver *driver) 1373 { 1374 driver_unregister(&driver->drv); 1375 } 1376 EXPORT_SYMBOL(sa1111_driver_unregister); 1377 1378 #ifdef CONFIG_DMABOUNCE 1379 /* 1380 * According to the "Intel StrongARM SA-1111 Microprocessor Companion 1381 * Chip Specification Update" (June 2000), erratum #7, there is a 1382 * significant bug in the SA1111 SDRAM shared memory controller. If 1383 * an access to a region of memory above 1MB relative to the bank base, 1384 * it is important that address bit 10 _NOT_ be asserted. Depending 1385 * on the configuration of the RAM, bit 10 may correspond to one 1386 * of several different (processor-relative) address bits. 1387 * 1388 * This routine only identifies whether or not a given DMA address 1389 * is susceptible to the bug. 1390 * 1391 * This should only get called for sa1111_device types due to the 1392 * way we configure our device dma_masks. 1393 */ 1394 static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size) 1395 { 1396 /* 1397 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module 1398 * User's Guide" mentions that jumpers R51 and R52 control the 1399 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or 1400 * SDRAM bank 1 on Neponset). The default configuration selects 1401 * Assabet, so any address in bank 1 is necessarily invalid. 1402 */ 1403 return (machine_is_assabet() || machine_is_pfs168()) && 1404 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000); 1405 } 1406 1407 static int sa1111_notifier_call(struct notifier_block *n, unsigned long action, 1408 void *data) 1409 { 1410 struct sa1111_dev *dev = SA1111_DEV(data); 1411 1412 switch (action) { 1413 case BUS_NOTIFY_ADD_DEVICE: 1414 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) { 1415 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096, 1416 sa1111_needs_bounce); 1417 if (ret) 1418 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret); 1419 } 1420 break; 1421 1422 case BUS_NOTIFY_DEL_DEVICE: 1423 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) 1424 dmabounce_unregister_dev(&dev->dev); 1425 break; 1426 } 1427 return NOTIFY_OK; 1428 } 1429 1430 static struct notifier_block sa1111_bus_notifier = { 1431 .notifier_call = sa1111_notifier_call, 1432 }; 1433 #endif 1434 1435 static int __init sa1111_init(void) 1436 { 1437 int ret = bus_register(&sa1111_bus_type); 1438 #ifdef CONFIG_DMABOUNCE 1439 if (ret == 0) 1440 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier); 1441 #endif 1442 if (ret == 0) 1443 platform_driver_register(&sa1111_device_driver); 1444 return ret; 1445 } 1446 1447 static void __exit sa1111_exit(void) 1448 { 1449 platform_driver_unregister(&sa1111_device_driver); 1450 #ifdef CONFIG_DMABOUNCE 1451 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier); 1452 #endif 1453 bus_unregister(&sa1111_bus_type); 1454 } 1455 1456 subsys_initcall(sa1111_init); 1457 module_exit(sa1111_exit); 1458 1459 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver"); 1460 MODULE_LICENSE("GPL"); 1461