1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Xen Virtual Machine for unprivileged guests 4 * 5 * Based on ARM Ltd. Versatile Express CoreTile Express (single CPU) 6 * Cortex-A15 MPCore (V2P-CA15) 7 * 8 */ 9 10/dts-v1/; 11 12/ { 13 model = "XENVM-4.2"; 14 compatible = "xen,xenvm-4.2", "xen,xenvm"; 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 chosen { 20 /* this field is going to be adjusted by the hypervisor */ 21 bootargs = "console=hvc0 root=/dev/xvda"; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 cpu@0 { 29 device_type = "cpu"; 30 compatible = "arm,cortex-a15"; 31 reg = <0>; 32 }; 33 34 cpu@1 { 35 device_type = "cpu"; 36 compatible = "arm,cortex-a15"; 37 reg = <1>; 38 }; 39 }; 40 41 psci { 42 compatible = "arm,psci"; 43 method = "hvc"; 44 cpu_off = <1>; 45 cpu_on = <2>; 46 }; 47 48 memory@80000000 { 49 device_type = "memory"; 50 /* this field is going to be adjusted by the hypervisor */ 51 reg = <0 0x80000000 0 0x08000000>; 52 }; 53 54 gic: interrupt-controller@2c001000 { 55 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 56 #interrupt-cells = <3>; 57 #address-cells = <0>; 58 interrupt-controller; 59 reg = <0 0x2c001000 0 0x1000>, 60 <0 0x2c002000 0 0x100>; 61 }; 62 63 timer { 64 compatible = "arm,armv7-timer"; 65 interrupts = <1 13 0xf08>, 66 <1 14 0xf08>, 67 <1 11 0xf08>, 68 <1 10 0xf08>; 69 }; 70 71 hypervisor { 72 compatible = "xen,xen-4.2", "xen,xen"; 73 /* this field is going to be adjusted by the hypervisor */ 74 reg = <0 0xb0000000 0 0x20000>; 75 /* this field is going to be adjusted by the hypervisor */ 76 interrupts = <1 15 0xf08>; 77 }; 78 79 motherboard { 80 arm,v2m-memory-map = "rs1"; 81 }; 82}; 83