1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * vt8500.dtsi - Device tree file for VIA VT8500 SoC 4 * 5 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> 6 */ 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 compatible = "via,vt8500"; 12 13 cpus { 14 #address-cells = <1>; 15 #size-cells = <0>; 16 17 cpu@0 { 18 device_type = "cpu"; 19 compatible = "arm,arm926ej-s"; 20 reg = <0x0>; 21 }; 22 }; 23 24 aliases { 25 serial0 = &uart0; 26 serial1 = &uart1; 27 serial2 = &uart2; 28 serial3 = &uart3; 29 }; 30 31 soc { 32 #address-cells = <1>; 33 #size-cells = <1>; 34 compatible = "simple-bus"; 35 ranges; 36 interrupt-parent = <&intc>; 37 38 intc: interrupt-controller@d8140000 { 39 compatible = "via,vt8500-intc"; 40 interrupt-controller; 41 reg = <0xd8140000 0x10000>; 42 #interrupt-cells = <1>; 43 }; 44 45 pinctrl: pinctrl@d8110000 { 46 compatible = "via,vt8500-pinctrl"; 47 reg = <0xd8110000 0x10000>; 48 interrupt-controller; 49 #interrupt-cells = <2>; 50 gpio-controller; 51 #gpio-cells = <2>; 52 }; 53 54 chipid@d8120000 { 55 compatible = "via,vt8500-scc-id"; 56 reg = <0xd8120000 0x4>; 57 }; 58 59 pmc@d8130000 { 60 compatible = "via,vt8500-pmc"; 61 reg = <0xd8130000 0x1000>; 62 63 clocks { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 ref24: ref24M { 68 #clock-cells = <0>; 69 compatible = "fixed-clock"; 70 clock-frequency = <24000000>; 71 }; 72 73 clkuart0: uart0 { 74 #clock-cells = <0>; 75 compatible = "via,vt8500-device-clock"; 76 clocks = <&ref24>; 77 enable-reg = <0x250>; 78 enable-bit = <1>; 79 }; 80 81 clkuart1: uart1 { 82 #clock-cells = <0>; 83 compatible = "via,vt8500-device-clock"; 84 clocks = <&ref24>; 85 enable-reg = <0x250>; 86 enable-bit = <2>; 87 }; 88 89 clkuart2: uart2 { 90 #clock-cells = <0>; 91 compatible = "via,vt8500-device-clock"; 92 clocks = <&ref24>; 93 enable-reg = <0x250>; 94 enable-bit = <3>; 95 }; 96 97 clkuart3: uart3 { 98 #clock-cells = <0>; 99 compatible = "via,vt8500-device-clock"; 100 clocks = <&ref24>; 101 enable-reg = <0x250>; 102 enable-bit = <4>; 103 }; 104 }; 105 }; 106 107 timer@d8130100 { 108 compatible = "via,vt8500-timer"; 109 reg = <0xd8130100 0x28>; 110 interrupts = <36>, <37>, <38>, <39>; 111 }; 112 113 usb@d8007900 { 114 compatible = "via,vt8500-ehci"; 115 reg = <0xd8007900 0x200>; 116 interrupts = <43>; 117 }; 118 119 usb@d8007b00 { 120 compatible = "platform-uhci"; 121 reg = <0xd8007b00 0x200>; 122 interrupts = <43>; 123 }; 124 125 fb: lcd-controller@d800e400 { 126 compatible = "via,vt8500-fb"; 127 reg = <0xd800e400 0x400>; 128 interrupts = <12>; 129 }; 130 131 ge_rops@d8050400 { 132 compatible = "wm,prizm-ge-rops"; 133 reg = <0xd8050400 0x100>; 134 }; 135 136 uart0: serial@d8200000 { 137 compatible = "via,vt8500-uart"; 138 reg = <0xd8200000 0x1040>; 139 interrupts = <32>; 140 clocks = <&clkuart0>; 141 status = "disabled"; 142 }; 143 144 uart1: serial@d82b0000 { 145 compatible = "via,vt8500-uart"; 146 reg = <0xd82b0000 0x1040>; 147 interrupts = <33>; 148 clocks = <&clkuart1>; 149 status = "disabled"; 150 }; 151 152 uart2: serial@d8210000 { 153 compatible = "via,vt8500-uart"; 154 reg = <0xd8210000 0x1040>; 155 interrupts = <47>; 156 clocks = <&clkuart2>; 157 status = "disabled"; 158 }; 159 160 uart3: serial@d82c0000 { 161 compatible = "via,vt8500-uart"; 162 reg = <0xd82c0000 0x1040>; 163 interrupts = <50>; 164 clocks = <&clkuart3>; 165 status = "disabled"; 166 }; 167 168 rtc@d8100000 { 169 compatible = "via,vt8500-rtc"; 170 reg = <0xd8100000 0x10000>; 171 interrupts = <48>; 172 }; 173 174 ethernet@d8004000 { 175 compatible = "via,vt8500-rhine"; 176 reg = <0xd8004000 0x100>; 177 interrupts = <10>; 178 }; 179 }; 180}; 181