1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * vt8500.dtsi - Device tree file for VIA VT8500 SoC 4 * 5 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> 6 */ 7 8/ { 9 #address-cells = <1>; 10 #size-cells = <1>; 11 compatible = "via,vt8500"; 12 13 cpus { 14 #address-cells = <0>; 15 #size-cells = <0>; 16 17 cpu { 18 device_type = "cpu"; 19 compatible = "arm,arm926ej-s"; 20 }; 21 }; 22 23 memory { 24 device_type = "memory"; 25 reg = <0x0 0x0>; 26 }; 27 28 aliases { 29 serial0 = &uart0; 30 serial1 = &uart1; 31 serial2 = &uart2; 32 serial3 = &uart3; 33 }; 34 35 soc { 36 #address-cells = <1>; 37 #size-cells = <1>; 38 compatible = "simple-bus"; 39 ranges; 40 interrupt-parent = <&intc>; 41 42 intc: interrupt-controller@d8140000 { 43 compatible = "via,vt8500-intc"; 44 interrupt-controller; 45 reg = <0xd8140000 0x10000>; 46 #interrupt-cells = <1>; 47 }; 48 49 pinctrl: pinctrl@d8110000 { 50 compatible = "via,vt8500-pinctrl"; 51 reg = <0xd8110000 0x10000>; 52 interrupt-controller; 53 #interrupt-cells = <2>; 54 gpio-controller; 55 #gpio-cells = <2>; 56 }; 57 58 chipid@d8120000 { 59 compatible = "via,vt8500-scc-id"; 60 reg = <0xd8120000 0x4>; 61 }; 62 63 pmc@d8130000 { 64 compatible = "via,vt8500-pmc"; 65 reg = <0xd8130000 0x1000>; 66 67 clocks { 68 #address-cells = <1>; 69 #size-cells = <0>; 70 71 ref24: ref24M { 72 #clock-cells = <0>; 73 compatible = "fixed-clock"; 74 clock-frequency = <24000000>; 75 }; 76 77 clkuart0: uart0 { 78 #clock-cells = <0>; 79 compatible = "via,vt8500-device-clock"; 80 clocks = <&ref24>; 81 enable-reg = <0x250>; 82 enable-bit = <1>; 83 }; 84 85 clkuart1: uart1 { 86 #clock-cells = <0>; 87 compatible = "via,vt8500-device-clock"; 88 clocks = <&ref24>; 89 enable-reg = <0x250>; 90 enable-bit = <2>; 91 }; 92 93 clkuart2: uart2 { 94 #clock-cells = <0>; 95 compatible = "via,vt8500-device-clock"; 96 clocks = <&ref24>; 97 enable-reg = <0x250>; 98 enable-bit = <3>; 99 }; 100 101 clkuart3: uart3 { 102 #clock-cells = <0>; 103 compatible = "via,vt8500-device-clock"; 104 clocks = <&ref24>; 105 enable-reg = <0x250>; 106 enable-bit = <4>; 107 }; 108 }; 109 }; 110 111 timer@d8130100 { 112 compatible = "via,vt8500-timer"; 113 reg = <0xd8130100 0x28>; 114 interrupts = <36>, <37>, <38>, <39>; 115 }; 116 117 usb@d8007900 { 118 compatible = "via,vt8500-ehci"; 119 reg = <0xd8007900 0x200>; 120 interrupts = <43>; 121 }; 122 123 usb@d8007b00 { 124 compatible = "platform-uhci"; 125 reg = <0xd8007b00 0x200>; 126 interrupts = <43>; 127 }; 128 129 fb: fb@d8050800 { 130 compatible = "via,vt8500-fb"; 131 reg = <0xd800e400 0x400>; 132 interrupts = <12>; 133 }; 134 135 ge_rops@d8050400 { 136 compatible = "wm,prizm-ge-rops"; 137 reg = <0xd8050400 0x100>; 138 }; 139 140 uart0: serial@d8200000 { 141 compatible = "via,vt8500-uart"; 142 reg = <0xd8200000 0x1040>; 143 interrupts = <32>; 144 clocks = <&clkuart0>; 145 status = "disabled"; 146 }; 147 148 uart1: serial@d82b0000 { 149 compatible = "via,vt8500-uart"; 150 reg = <0xd82b0000 0x1040>; 151 interrupts = <33>; 152 clocks = <&clkuart1>; 153 status = "disabled"; 154 }; 155 156 uart2: serial@d8210000 { 157 compatible = "via,vt8500-uart"; 158 reg = <0xd8210000 0x1040>; 159 interrupts = <47>; 160 clocks = <&clkuart2>; 161 status = "disabled"; 162 }; 163 164 uart3: serial@d82c0000 { 165 compatible = "via,vt8500-uart"; 166 reg = <0xd82c0000 0x1040>; 167 interrupts = <50>; 168 clocks = <&clkuart3>; 169 status = "disabled"; 170 }; 171 172 rtc@d8100000 { 173 compatible = "via,vt8500-rtc"; 174 reg = <0xd8100000 0x10000>; 175 interrupts = <48>; 176 }; 177 178 ethernet@d8004000 { 179 compatible = "via,vt8500-rhine"; 180 reg = <0xd8004000 0x100>; 181 interrupts = <10>; 182 }; 183 }; 184}; 185