1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (c) 2017 Andreas Färber 4*724ba675SRob Herring * Copyright (c) 2018 Manivannan Sadhasivam 5*724ba675SRob Herring */ 6*724ba675SRob Herring 7*724ba675SRob Herring/dts-v1/; 8*724ba675SRob Herring 9*724ba675SRob Herring#include "rda8810pl.dtsi" 10*724ba675SRob Herring 11*724ba675SRob Herring/ { 12*724ba675SRob Herring compatible = "xunlong,orangepi-i96", "rda,8810pl"; 13*724ba675SRob Herring model = "Orange Pi i96"; 14*724ba675SRob Herring 15*724ba675SRob Herring aliases { 16*724ba675SRob Herring serial0 = &uart2; 17*724ba675SRob Herring serial1 = &uart1; 18*724ba675SRob Herring serial2 = &uart3; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring chosen { 22*724ba675SRob Herring stdout-path = "serial2:921600n8"; 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring memory@80000000 { 26*724ba675SRob Herring device_type = "memory"; 27*724ba675SRob Herring reg = <0x80000000 0x10000000>; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring uart_clk: uart-clk { 31*724ba675SRob Herring compatible = "fixed-clock"; 32*724ba675SRob Herring clock-frequency = <921600>; 33*724ba675SRob Herring #clock-cells = <0>; 34*724ba675SRob Herring }; 35*724ba675SRob Herring}; 36*724ba675SRob Herring 37*724ba675SRob Herring&uart1 { 38*724ba675SRob Herring status = "okay"; 39*724ba675SRob Herring clocks = <&uart_clk>; 40*724ba675SRob Herring}; 41*724ba675SRob Herring 42*724ba675SRob Herring&uart2 { 43*724ba675SRob Herring status = "okay"; 44*724ba675SRob Herring clocks = <&uart_clk>; 45*724ba675SRob Herring}; 46*724ba675SRob Herring 47*724ba675SRob Herring&uart3 { 48*724ba675SRob Herring status = "okay"; 49*724ba675SRob Herring clocks = <&uart_clk>; 50*724ba675SRob Herring}; 51