1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz> 4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi> 5 */ 6 7/dts-v1/; 8 9#include "omap34xx.dtsi" 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/media/video-interfaces.h> 13 14/* 15 * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall 16 * for omap AES HW crypto support. When linux kernel try to access memory of AES 17 * blocks then kernel receive "Unhandled fault: external abort on non-linefetch" 18 * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no 19 * crash anymore) omap AES support will be disabled for all Nokia N900 devices. 20 * There is "unofficial" version of bootloader which enables AES in L3 firewall 21 * but it is not widely used and to prevent kernel crash rather AES is disabled. 22 * There is also no runtime detection code if AES is disabled in L3 firewall... 23 */ 24&aes1_target { 25 status = "disabled"; 26}; 27 28&aes2_target { 29 status = "disabled"; 30}; 31 32/ { 33 model = "Nokia N900"; 34 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; 35 36 aliases { 37 i2c0; 38 i2c1 = &i2c1; 39 i2c2 = &i2c2; 40 i2c3 = &i2c3; 41 display0 = &lcd; 42 display1 = &tv; 43 }; 44 45 cpus { 46 cpu@0 { 47 cpu0-supply = <&vcc>; 48 }; 49 }; 50 51 leds { 52 compatible = "gpio-leds"; 53 led-heartbeat { 54 label = "debug::sleep"; 55 gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */ 56 linux,default-trigger = "default-on"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&debug_leds>; 59 }; 60 }; 61 62 memory@80000000 { 63 device_type = "memory"; 64 reg = <0x80000000 0x10000000>; /* 256 MB */ 65 }; 66 67 gpio_keys { 68 compatible = "gpio-keys"; 69 70 camera_lens_cover { 71 label = "Camera Lens Cover"; 72 gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */ 73 linux,input-type = <EV_SW>; 74 linux,code = <SW_CAMERA_LENS_COVER>; 75 linux,can-disable; 76 }; 77 78 camera_focus { 79 label = "Camera Focus"; 80 gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */ 81 linux,code = <KEY_CAMERA_FOCUS>; 82 linux,can-disable; 83 }; 84 85 camera_capture { 86 label = "Camera Capture"; 87 gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */ 88 linux,code = <KEY_CAMERA>; 89 linux,can-disable; 90 }; 91 92 lock_button { 93 label = "Lock Button"; 94 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */ 95 linux,code = <KEY_SCREENLOCK>; 96 linux,can-disable; 97 }; 98 99 keypad_slide { 100 label = "Keypad Slide"; 101 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */ 102 linux,input-type = <EV_SW>; 103 linux,code = <SW_KEYPAD_SLIDE>; 104 linux,can-disable; 105 }; 106 107 proximity_sensor { 108 label = "Proximity Sensor"; 109 gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */ 110 linux,input-type = <EV_SW>; 111 linux,code = <SW_FRONT_PROXIMITY>; 112 linux,can-disable; 113 }; 114 115 machine_cover { 116 label = "Machine Cover"; 117 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */ 118 linux,input-type = <EV_SW>; 119 linux,code = <SW_MACHINE_COVER>; 120 linux,can-disable; 121 }; 122 }; 123 124 isp1707: isp1707 { 125 compatible = "nxp,isp1707"; 126 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>; 127 usb-phy = <&usb2_phy>; 128 }; 129 130 tv: connector { 131 compatible = "composite-video-connector"; 132 label = "tv"; 133 134 port { 135 tv_connector_in: endpoint { 136 remote-endpoint = <&venc_out>; 137 }; 138 }; 139 }; 140 141 sound: n900-audio { 142 compatible = "nokia,n900-audio"; 143 144 nokia,cpu-dai = <&mcbsp2>; 145 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>; 146 nokia,headphone-amplifier = <&tpa6130a2>; 147 148 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */ 149 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */ 150 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */ 151 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>; 152 }; 153 154 battery: n900-battery { 155 compatible = "nokia,n900-battery"; 156 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>; 157 io-channel-names = "temp", "bsi", "vbat"; 158 }; 159 160 pwm9: pwm-9 { 161 compatible = "ti,omap-dmtimer-pwm"; 162 #pwm-cells = <3>; 163 ti,timers = <&timer9>; 164 ti,clock-source = <0x00>; /* timer_sys_ck */ 165 }; 166 167 ir: n900-ir { 168 compatible = "nokia,n900-ir"; 169 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */ 170 }; 171 172 rom_rng: rng { 173 compatible = "nokia,n900-rom-rng"; 174 clocks = <&rng_ick>; 175 clock-names = "ick"; 176 }; 177 178 /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */ 179 vctcxo: vctcxo { 180 compatible = "fixed-clock"; 181 #clock-cells = <0>; 182 clock-frequency = <38400000>; 183 }; 184}; 185 186&isp { 187 vdds_csib-supply = <&vaux2>; 188 189 pinctrl-names = "default"; 190 pinctrl-0 = <&camera_pins>; 191 192 ports { 193 port@1 { 194 reg = <1>; 195 196 csi_isp: endpoint { 197 remote-endpoint = <&csi_cam1>; 198 bus-type = <MEDIA_BUS_TYPE_CCP2>; 199 clock-lanes = <1>; 200 data-lanes = <0>; 201 lane-polarity = <0 0>; 202 /* Select strobe = <1> for back camera, <0> for front camera */ 203 strobe = <1>; 204 }; 205 }; 206 }; 207}; 208 209&omap3_pmx_core { 210 pinctrl-names = "default"; 211 212 uart2_pins: uart2-pins { 213 pinctrl-single,pins = < 214 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */ 215 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts */ 216 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */ 217 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */ 218 >; 219 }; 220 221 uart3_pins: uart3-pins { 222 pinctrl-single,pins = < 223 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx */ 224 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx */ 225 >; 226 }; 227 228 ethernet_pins: ethernet-pins { 229 pinctrl-single,pins = < 230 OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */ 231 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */ 232 OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */ 233 >; 234 }; 235 236 gpmc_pins: gpmc-pins { 237 pinctrl-single,pins = < 238 239 /* address lines */ 240 OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ 241 OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ 242 OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ 243 244 /* data lines, gpmc_d0..d7 not muxable according to TRM */ 245 OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ 246 OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ 247 OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ 248 OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ 249 OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ 250 OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ 251 OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ 252 OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ 253 254 /* 255 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable 256 * according to TRM. OneNAND seems to require PIN_INPUT on clock. 257 */ 258 OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ 259 OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ 260 >; 261 }; 262 263 i2c1_pins: i2c1-pins { 264 pinctrl-single,pins = < 265 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl */ 266 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda */ 267 >; 268 }; 269 270 i2c2_pins: i2c2-pins { 271 pinctrl-single,pins = < 272 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ 273 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ 274 >; 275 }; 276 277 i2c3_pins: i2c3-pins { 278 pinctrl-single,pins = < 279 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ 280 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ 281 >; 282 }; 283 284 debug_leds: debug-led-pins { 285 pinctrl-single,pins = < 286 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_clkx.gpio_162 */ 287 >; 288 }; 289 290 mcspi4_pins: mcspi4-pins { 291 pinctrl-single,pins = < 292 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */ 293 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */ 294 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */ 295 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */ 296 >; 297 }; 298 299 mmc1_pins: mmc1-pins { 300 pinctrl-single,pins = < 301 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */ 302 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */ 303 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */ 304 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */ 305 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */ 306 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */ 307 >; 308 }; 309 310 mmc2_pins: mmc2-pins { 311 pinctrl-single,pins = < 312 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */ 313 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */ 314 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */ 315 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */ 316 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */ 317 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */ 318 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */ 319 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */ 320 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */ 321 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */ 322 >; 323 }; 324 325 acx565akm_pins: acx565akm-pins { 326 pinctrl-single,pins = < 327 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */ 328 >; 329 }; 330 331 dss_sdi_pins: dss-sdi-pins { 332 pinctrl-single,pins = < 333 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */ 334 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */ 335 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */ 336 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */ 337 338 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */ 339 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */ 340 >; 341 }; 342 343 wl1251_pins: wl1251-pins { 344 pinctrl-single,pins = < 345 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */ 346 OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */ 347 >; 348 }; 349 350 ssi_pins: ssi-pins { 351 pinctrl-single,pins = < 352 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */ 353 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1) /* ssi1_flag_tx */ 354 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4) /* ssi1_wake_tx (cawake) */ 355 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1) /* ssi1_dat_tx */ 356 OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1) /* ssi1_dat_rx */ 357 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1) /* ssi1_flag_rx */ 358 OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1) /* ssi1_rdy_rx */ 359 OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1) /* ssi1_wake */ 360 >; 361 }; 362 363 modem_pins: modem-pins { 364 pinctrl-single,pins = < 365 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4) /* gpio 70 => cmt_apeslpx */ 366 OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* gpio 72 => ape_rst_rq */ 367 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* gpio 73 => cmt_rst_rq */ 368 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* gpio 74 => cmt_en */ 369 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4) /* gpio 75 => cmt_rst */ 370 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* gpio 157 => cmt_bsi */ 371 >; 372 }; 373 374 camera_pins: camera-pins { 375 pinctrl-single,pins = < 376 OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7) /* cam_hs */ 377 OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7) /* cam_vs */ 378 OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */ 379 OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7) /* cam_d4 */ 380 OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0) /* cam_d6 */ 381 OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0) /* cam_d7 */ 382 OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0) /* cam_d8 */ 383 OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0) /* cam_d9 */ 384 OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7) /* cam_d10 */ 385 OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7) /* cam_xclkb */ 386 OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0) /* cam_strobe */ 387 >; 388 }; 389}; 390 391&i2c1 { 392 pinctrl-names = "default"; 393 pinctrl-0 = <&i2c1_pins>; 394 395 clock-frequency = <2200000>; 396 397 twl: twl@48 { 398 reg = <0x48>; 399 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 400 interrupt-parent = <&intc>; 401 }; 402}; 403 404#include "twl4030.dtsi" 405#include "twl4030_omap3.dtsi" 406 407&vaux1 { 408 regulator-name = "V28"; 409 regulator-min-microvolt = <2800000>; 410 regulator-max-microvolt = <2800000>; 411 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 412 regulator-always-on; /* due to battery cover sensor */ 413}; 414 415&vaux2 { 416 regulator-name = "VCSI"; 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 420}; 421 422&vaux3 { 423 regulator-name = "VMMC2_30"; 424 regulator-min-microvolt = <2800000>; 425 regulator-max-microvolt = <3000000>; 426 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 427}; 428 429&vaux4 { 430 regulator-name = "VCAM_ANA_28"; 431 regulator-min-microvolt = <2800000>; 432 regulator-max-microvolt = <2800000>; 433 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 434}; 435 436&vmmc1 { 437 regulator-name = "VMMC1"; 438 regulator-min-microvolt = <1850000>; 439 regulator-max-microvolt = <3150000>; 440 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 441}; 442 443&vmmc2 { 444 regulator-name = "V28_A"; 445 regulator-min-microvolt = <2800000>; 446 regulator-max-microvolt = <3000000>; 447 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 448 regulator-always-on; /* due VIO leak to AIC34 VDDs */ 449}; 450 451&vpll1 { 452 regulator-name = "VPLL"; 453 regulator-min-microvolt = <1800000>; 454 regulator-max-microvolt = <1800000>; 455 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 456 regulator-always-on; 457}; 458 459&vpll2 { 460 regulator-name = "VSDI_CSI"; 461 regulator-min-microvolt = <1800000>; 462 regulator-max-microvolt = <1800000>; 463 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 464 regulator-always-on; 465}; 466 467&vsim { 468 regulator-name = "VMMC2_IO_18"; 469 regulator-min-microvolt = <1800000>; 470 regulator-max-microvolt = <1800000>; 471 regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */ 472}; 473 474&vio { 475 regulator-name = "VIO"; 476 regulator-min-microvolt = <1800000>; 477 regulator-max-microvolt = <1800000>; 478}; 479 480&vintana1 { 481 regulator-name = "VINTANA1"; 482 /* fixed to 1500000 */ 483 regulator-always-on; 484}; 485 486&vintana2 { 487 regulator-name = "VINTANA2"; 488 regulator-min-microvolt = <2750000>; 489 regulator-max-microvolt = <2750000>; 490 regulator-always-on; 491}; 492 493&vintdig { 494 regulator-name = "VINTDIG"; 495 /* fixed to 1500000 */ 496 regulator-always-on; 497}; 498 499/* First two dma channels are reserved on secure omap3 */ 500&sdma { 501 dma-channel-mask = <0xfffffffc>; 502}; 503 504&twl { 505 twl_audio: audio { 506 compatible = "ti,twl4030-audio"; 507 ti,enable-vibra = <1>; 508 }; 509 510 twl_power: power { 511 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off"; 512 ti,use_poweroff; 513 }; 514}; 515 516&twl_keypad { 517 linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q) 518 MATRIX_KEY(0x00, 0x01, KEY_O) 519 MATRIX_KEY(0x00, 0x02, KEY_P) 520 MATRIX_KEY(0x00, 0x03, KEY_COMMA) 521 MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE) 522 MATRIX_KEY(0x00, 0x06, KEY_A) 523 MATRIX_KEY(0x00, 0x07, KEY_S) 524 525 MATRIX_KEY(0x01, 0x00, KEY_W) 526 MATRIX_KEY(0x01, 0x01, KEY_D) 527 MATRIX_KEY(0x01, 0x02, KEY_F) 528 MATRIX_KEY(0x01, 0x03, KEY_G) 529 MATRIX_KEY(0x01, 0x04, KEY_H) 530 MATRIX_KEY(0x01, 0x05, KEY_J) 531 MATRIX_KEY(0x01, 0x06, KEY_K) 532 MATRIX_KEY(0x01, 0x07, KEY_L) 533 534 MATRIX_KEY(0x02, 0x00, KEY_E) 535 MATRIX_KEY(0x02, 0x01, KEY_DOT) 536 MATRIX_KEY(0x02, 0x02, KEY_UP) 537 MATRIX_KEY(0x02, 0x03, KEY_ENTER) 538 MATRIX_KEY(0x02, 0x05, KEY_Z) 539 MATRIX_KEY(0x02, 0x06, KEY_X) 540 MATRIX_KEY(0x02, 0x07, KEY_C) 541 MATRIX_KEY(0x02, 0x08, KEY_F9) 542 543 MATRIX_KEY(0x03, 0x00, KEY_R) 544 MATRIX_KEY(0x03, 0x01, KEY_V) 545 MATRIX_KEY(0x03, 0x02, KEY_B) 546 MATRIX_KEY(0x03, 0x03, KEY_N) 547 MATRIX_KEY(0x03, 0x04, KEY_M) 548 MATRIX_KEY(0x03, 0x05, KEY_SPACE) 549 MATRIX_KEY(0x03, 0x06, KEY_SPACE) 550 MATRIX_KEY(0x03, 0x07, KEY_LEFT) 551 552 MATRIX_KEY(0x04, 0x00, KEY_T) 553 MATRIX_KEY(0x04, 0x01, KEY_DOWN) 554 MATRIX_KEY(0x04, 0x02, KEY_RIGHT) 555 MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL) 556 MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT) 557 MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT) 558 MATRIX_KEY(0x04, 0x08, KEY_F10) 559 560 MATRIX_KEY(0x05, 0x00, KEY_Y) 561 MATRIX_KEY(0x05, 0x08, KEY_F11) 562 563 MATRIX_KEY(0x06, 0x00, KEY_U) 564 565 MATRIX_KEY(0x07, 0x00, KEY_I) 566 MATRIX_KEY(0x07, 0x01, KEY_F7) 567 MATRIX_KEY(0x07, 0x02, KEY_F8) 568 >; 569}; 570 571&twl_gpio { 572 ti,pullups = <0x0>; 573 ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */ 574}; 575 576&i2c2 { 577 pinctrl-names = "default"; 578 pinctrl-0 = <&i2c2_pins>; 579 580 clock-frequency = <100000>; 581 582 tlv320aic3x: tlv320aic3x@18 { 583 compatible = "ti,tlv320aic3x"; 584 reg = <0x18>; 585 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */ 586 ai3x-gpio-func = < 587 0 /* AIC3X_GPIO1_FUNC_DISABLED */ 588 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ 589 >; 590 591 AVDD-supply = <&vmmc2>; 592 DRVDD-supply = <&vmmc2>; 593 IOVDD-supply = <&vio>; 594 DVDD-supply = <&vio>; 595 596 ai3x-micbias-vg = <1>; 597 }; 598 599 tlv320aic3x_aux: tlv320aic3x@19 { 600 compatible = "ti,tlv320aic3x"; 601 reg = <0x19>; 602 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */ 603 604 AVDD-supply = <&vmmc2>; 605 DRVDD-supply = <&vmmc2>; 606 IOVDD-supply = <&vio>; 607 DVDD-supply = <&vio>; 608 609 ai3x-micbias-vg = <2>; 610 }; 611 612 tsl2563: tsl2563@29 { 613 compatible = "amstaos,tsl2563"; 614 reg = <0x29>; 615 616 amstaos,cover-comp-gain = <16>; 617 }; 618 619 adp1653: led-controller@30 { 620 compatible = "adi,adp1653"; 621 reg = <0x30>; 622 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */ 623 624 flash { 625 flash-timeout-us = <500000>; 626 flash-max-microamp = <320000>; 627 led-max-microamp = <50000>; 628 }; 629 indicator { 630 led-max-microamp = <17500>; 631 }; 632 }; 633 634 lp5523: lp5523@32 { 635 #address-cells = <1>; 636 #size-cells = <0>; 637 compatible = "national,lp5523"; 638 reg = <0x32>; 639 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */ 640 enable-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */ 641 642 led@0 { 643 reg = <0>; 644 chan-name = "lp5523:kb1"; 645 led-cur = /bits/ 8 <50>; 646 max-cur = /bits/ 8 <100>; 647 color = <LED_COLOR_ID_WHITE>; 648 function = LED_FUNCTION_KBD_BACKLIGHT; 649 }; 650 651 led@1 { 652 reg = <1>; 653 chan-name = "lp5523:kb2"; 654 led-cur = /bits/ 8 <50>; 655 max-cur = /bits/ 8 <100>; 656 color = <LED_COLOR_ID_WHITE>; 657 function = LED_FUNCTION_KBD_BACKLIGHT; 658 }; 659 660 led@2 { 661 reg = <2>; 662 chan-name = "lp5523:kb3"; 663 led-cur = /bits/ 8 <50>; 664 max-cur = /bits/ 8 <100>; 665 color = <LED_COLOR_ID_WHITE>; 666 function = LED_FUNCTION_KBD_BACKLIGHT; 667 }; 668 669 led@3 { 670 reg = <3>; 671 chan-name = "lp5523:kb4"; 672 led-cur = /bits/ 8 <50>; 673 max-cur = /bits/ 8 <100>; 674 color = <LED_COLOR_ID_WHITE>; 675 function = LED_FUNCTION_KBD_BACKLIGHT; 676 }; 677 678 led@4 { 679 reg = <4>; 680 chan-name = "lp5523:b"; 681 led-cur = /bits/ 8 <50>; 682 max-cur = /bits/ 8 <100>; 683 color = <LED_COLOR_ID_BLUE>; 684 function = LED_FUNCTION_STATUS; 685 }; 686 687 led@5 { 688 reg = <5>; 689 chan-name = "lp5523:g"; 690 led-cur = /bits/ 8 <50>; 691 max-cur = /bits/ 8 <100>; 692 color = <LED_COLOR_ID_GREEN>; 693 function = LED_FUNCTION_STATUS; 694 }; 695 696 led@6 { 697 reg = <6>; 698 chan-name = "lp5523:r"; 699 led-cur = /bits/ 8 <50>; 700 max-cur = /bits/ 8 <100>; 701 color = <LED_COLOR_ID_RED>; 702 function = LED_FUNCTION_STATUS; 703 }; 704 705 led@7 { 706 reg = <7>; 707 chan-name = "lp5523:kb5"; 708 led-cur = /bits/ 8 <50>; 709 max-cur = /bits/ 8 <100>; 710 color = <LED_COLOR_ID_WHITE>; 711 function = LED_FUNCTION_KBD_BACKLIGHT; 712 }; 713 714 led@8 { 715 reg = <8>; 716 chan-name = "lp5523:kb6"; 717 led-cur = /bits/ 8 <50>; 718 max-cur = /bits/ 8 <100>; 719 color = <LED_COLOR_ID_WHITE>; 720 function = LED_FUNCTION_KBD_BACKLIGHT; 721 }; 722 }; 723 724 bq27200: bq27200@55 { 725 compatible = "ti,bq27200"; 726 reg = <0x55>; 727 power-supplies = <&bq24150a>; 728 }; 729 730 /* Stereo headphone amplifier */ 731 tpa6130a2: tpa6130a2@60 { 732 compatible = "ti,tpa6130a2"; 733 reg = <0x60>; 734 735 Vdd-supply = <&vmmc2>; 736 737 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */ 738 }; 739 740 si4713: si4713@63 { 741 compatible = "silabs,si4713"; 742 reg = <0x63>; 743 744 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */ 745 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */ 746 vio-supply = <&vio>; 747 vdd-supply = <&vaux1>; 748 }; 749 750 bq24150a: bq24150a@6b { 751 compatible = "ti,bq24150a"; 752 reg = <0x6b>; 753 754 ti,current-limit = <100>; 755 ti,weak-battery-voltage = <3400>; 756 ti,battery-regulation-voltage = <4200>; 757 ti,charge-current = <950>; 758 ti,termination-current = <100>; 759 ti,resistor-sense = <68>; 760 761 ti,usb-charger-detection = <&isp1707>; 762 }; 763}; 764 765&i2c3 { 766 pinctrl-names = "default"; 767 pinctrl-0 = <&i2c3_pins>; 768 769 clock-frequency = <400000>; 770 771 accelerometer@1d { 772 compatible = "st,lis302dl"; 773 reg = <0x1d>; 774 775 vdd-supply = <&vaux1>; 776 vddio-supply = <&vio>; 777 778 interrupt-parent = <&gpio6>; 779 interrupts = <21 IRQ_TYPE_EDGE_RISING>, 780 <20 IRQ_TYPE_EDGE_RISING>; /* 181 and 180 */ 781 782 mount-matrix = "-1", "0", "0", 783 "0", "1", "0", 784 "0", "0", "-1"; 785 }; 786 787 cam1: camera@3e { 788 compatible = "toshiba,et8ek8"; 789 reg = <0x3e>; 790 791 vana-supply = <&vaux4>; 792 793 clocks = <&isp 0>; 794 clock-names = "extclk"; 795 clock-frequency = <9600000>; 796 797 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */ 798 799 lens-focus = <&ad5820>; 800 801 port { 802 csi_cam1: endpoint { 803 bus-type = <MEDIA_BUS_TYPE_CCP2>; 804 strobe = <1>; 805 clock-inv = <0>; 806 crc = <1>; 807 808 remote-endpoint = <&csi_isp>; 809 }; 810 }; 811 }; 812 813 /* D/A converter for auto-focus */ 814 ad5820: dac@c { 815 compatible = "adi,ad5820"; 816 reg = <0x0c>; 817 818 VANA-supply = <&vaux4>; 819 820 #io-channel-cells = <0>; 821 }; 822}; 823 824&mmc1 { 825 pinctrl-names = "default"; 826 pinctrl-0 = <&mmc1_pins>; 827 vmmc-supply = <&vmmc1>; 828 bus-width = <4>; 829}; 830 831/* most boards use vaux3, only some old versions use vmmc2 instead */ 832&mmc2 { 833 pinctrl-names = "default"; 834 pinctrl-0 = <&mmc2_pins>; 835 vmmc-supply = <&vaux3>; 836 vqmmc-supply = <&vsim>; 837 bus-width = <8>; 838 non-removable; 839 no-sdio; 840 no-sd; 841}; 842 843&mmc3 { 844 status = "disabled"; 845}; 846 847&gpmc { 848 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */ 849 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */ 850 pinctrl-names = "default"; 851 pinctrl-0 = <&gpmc_pins>; 852 853 /* sys_ndmareq1 could be used by the driver, not as gpio65 though */ 854 onenand@0,0 { 855 #address-cells = <1>; 856 #size-cells = <1>; 857 compatible = "ti,omap2-onenand"; 858 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 859 860 /* 861 * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported 862 * bootloader set values when booted with v5.1 863 * (OneNAND Manufacturer: Samsung): 864 * 865 * cs0 GPMC_CS_CONFIG1: 0xfb001202 866 * cs0 GPMC_CS_CONFIG2: 0x00111100 867 * cs0 GPMC_CS_CONFIG3: 0x00020200 868 * cs0 GPMC_CS_CONFIG4: 0x11001102 869 * cs0 GPMC_CS_CONFIG5: 0x03101616 870 * cs0 GPMC_CS_CONFIG6: 0x90060000 871 */ 872 gpmc,sync-read; 873 gpmc,sync-write; 874 gpmc,burst-length = <16>; 875 gpmc,burst-read; 876 gpmc,burst-wrap; 877 gpmc,burst-write; 878 gpmc,device-width = <2>; 879 gpmc,mux-add-data = <2>; 880 gpmc,cs-on-ns = <0>; 881 gpmc,cs-rd-off-ns = <102>; 882 gpmc,cs-wr-off-ns = <102>; 883 gpmc,adv-on-ns = <0>; 884 gpmc,adv-rd-off-ns = <12>; 885 gpmc,adv-wr-off-ns = <12>; 886 gpmc,oe-on-ns = <12>; 887 gpmc,oe-off-ns = <102>; 888 gpmc,we-on-ns = <0>; 889 gpmc,we-off-ns = <102>; 890 gpmc,rd-cycle-ns = <132>; 891 gpmc,wr-cycle-ns = <132>; 892 gpmc,access-ns = <96>; 893 gpmc,page-burst-access-ns = <18>; 894 gpmc,bus-turnaround-ns = <0>; 895 gpmc,cycle2cycle-delay-ns = <0>; 896 gpmc,wait-monitoring-ns = <0>; 897 gpmc,clk-activation-ns = <6>; 898 gpmc,wr-data-mux-bus-ns = <36>; 899 gpmc,wr-access-ns = <96>; 900 gpmc,sync-clk-ps = <15000>; 901 902 /* 903 * MTD partition table corresponding to Nokia's 904 * Maemo 5 (Fremantle) release. 905 */ 906 partition@0 { 907 label = "bootloader"; 908 reg = <0x00000000 0x00020000>; 909 read-only; 910 }; 911 partition@1 { 912 label = "config"; 913 reg = <0x00020000 0x00060000>; 914 }; 915 partition@2 { 916 label = "log"; 917 reg = <0x00080000 0x00040000>; 918 }; 919 partition@3 { 920 label = "kernel"; 921 reg = <0x000c0000 0x00200000>; 922 }; 923 partition@4 { 924 label = "initfs"; 925 reg = <0x002c0000 0x00200000>; 926 }; 927 partition@5 { 928 label = "rootfs"; 929 reg = <0x004c0000 0x0fb40000>; 930 }; 931 }; 932 933 /* Ethernet is on some early development boards and qemu */ 934 ethernet@gpmc { 935 compatible = "smsc,lan91c94"; 936 interrupt-parent = <&gpio2>; 937 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ 938 reg = <1 0 0xf>; /* 16 byte IO range */ 939 bank-width = <2>; 940 pinctrl-names = "default"; 941 pinctrl-0 = <ðernet_pins>; 942 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; /* gpio86 */ 943 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* gpio164 */ 944 gpmc,device-width = <2>; 945 gpmc,sync-clk-ps = <0>; 946 gpmc,cs-on-ns = <0>; 947 gpmc,cs-rd-off-ns = <48>; 948 gpmc,cs-wr-off-ns = <24>; 949 gpmc,adv-on-ns = <0>; 950 gpmc,adv-rd-off-ns = <0>; 951 gpmc,adv-wr-off-ns = <0>; 952 gpmc,we-on-ns = <12>; 953 gpmc,we-off-ns = <18>; 954 gpmc,oe-on-ns = <12>; 955 gpmc,oe-off-ns = <48>; 956 gpmc,page-burst-access-ns = <0>; 957 gpmc,access-ns = <42>; 958 gpmc,rd-cycle-ns = <180>; 959 gpmc,wr-cycle-ns = <180>; 960 gpmc,bus-turnaround-ns = <0>; 961 gpmc,cycle2cycle-delay-ns = <0>; 962 gpmc,wait-monitoring-ns = <0>; 963 gpmc,clk-activation-ns = <0>; 964 gpmc,wr-access-ns = <0>; 965 gpmc,wr-data-mux-bus-ns = <12>; 966 }; 967}; 968 969&mcspi1 { 970 /* 971 * For some reason, touchscreen is necessary for screen to work at 972 * all on real hw. It works well without it on emulator. 973 * 974 * Also... order in the device tree actually matters here. 975 */ 976 tsc2005@0 { 977 compatible = "ti,tsc2005"; 978 spi-max-frequency = <6000000>; 979 reg = <0>; 980 981 vio-supply = <&vio>; 982 983 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */ 984 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */ 985 986 touchscreen-fuzz-x = <4>; 987 touchscreen-fuzz-y = <7>; 988 touchscreen-fuzz-pressure = <2>; 989 touchscreen-size-x = <4096>; 990 touchscreen-size-y = <4096>; 991 touchscreen-max-pressure = <2048>; 992 993 ti,x-plate-ohms = <280>; 994 ti,esd-recovery-timeout-ms = <8000>; 995 }; 996 997 lcd: acx565akm@2 { 998 compatible = "sony,acx565akm"; 999 spi-max-frequency = <6000000>; 1000 reg = <2>; 1001 1002 pinctrl-names = "default"; 1003 pinctrl-0 = <&acx565akm_pins>; 1004 1005 label = "lcd"; 1006 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */ 1007 1008 port { 1009 lcd_in: endpoint { 1010 remote-endpoint = <&sdi_out>; 1011 }; 1012 }; 1013 }; 1014}; 1015 1016&mcspi4 { 1017 pinctrl-names = "default"; 1018 pinctrl-0 = <&mcspi4_pins>; 1019 1020 wl1251@0 { 1021 pinctrl-names = "default"; 1022 pinctrl-0 = <&wl1251_pins>; 1023 1024 vio-supply = <&vio>; 1025 1026 compatible = "ti,wl1251"; 1027 reg = <0>; 1028 spi-max-frequency = <48000000>; 1029 1030 spi-cpol; 1031 spi-cpha; 1032 1033 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */ 1034 1035 interrupt-parent = <&gpio2>; 1036 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */ 1037 1038 clocks = <&vctcxo>; 1039 }; 1040}; 1041 1042/* RNG not directly accessible on n900, see omap3-rom-rng instead */ 1043&rng_target { 1044 status = "disabled"; 1045}; 1046 1047&usb_otg_hs { 1048 interface-type = <0>; 1049 usb-phy = <&usb2_phy>; 1050 phys = <&usb2_phy>; 1051 phy-names = "usb2-phy"; 1052 mode = <2>; 1053 power = <50>; 1054}; 1055 1056&uart1 { 1057 status = "disabled"; 1058}; 1059 1060&uart2 { 1061 pinctrl-names = "default"; 1062 pinctrl-0 = <&uart2_pins>; 1063 1064 bcm2048: bluetooth { 1065 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth"; 1066 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */ 1067 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */ 1068 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */ 1069 clocks = <&vctcxo>; 1070 clock-names = "sysclk"; 1071 }; 1072}; 1073 1074&uart3 { 1075 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>; 1076 pinctrl-names = "default"; 1077 pinctrl-0 = <&uart3_pins>; 1078}; 1079 1080&dss { 1081 status = "okay"; 1082 1083 pinctrl-names = "default"; 1084 pinctrl-0 = <&dss_sdi_pins>; 1085 1086 vdds_sdi-supply = <&vaux1>; 1087 1088 ports { 1089 #address-cells = <1>; 1090 #size-cells = <0>; 1091 1092 port@1 { 1093 reg = <1>; 1094 1095 sdi_out: endpoint { 1096 remote-endpoint = <&lcd_in>; 1097 datapairs = <2>; 1098 }; 1099 }; 1100 }; 1101}; 1102 1103&venc { 1104 status = "okay"; 1105 1106 vdda-supply = <&vdac>; 1107 1108 port { 1109 venc_out: endpoint { 1110 remote-endpoint = <&tv_connector_in>; 1111 ti,channels = <1>; 1112 }; 1113 }; 1114}; 1115 1116&mcbsp2 { 1117 status = "okay"; 1118}; 1119 1120&ssi_port1 { 1121 pinctrl-names = "default"; 1122 pinctrl-0 = <&ssi_pins>; 1123 1124 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */ 1125 1126 modem: hsi-client { 1127 compatible = "nokia,n900-modem"; 1128 1129 pinctrl-names = "default"; 1130 pinctrl-0 = <&modem_pins>; 1131 1132 hsi-channel-ids = <0>, <1>, <2>, <3>; 1133 hsi-channel-names = "mcsaab-control", 1134 "speech-control", 1135 "speech-data", 1136 "mcsaab-data"; 1137 hsi-speed-kbps = <55000>; 1138 hsi-mode = "frame"; 1139 hsi-flow = "synchronized"; 1140 hsi-arb-mode = "round-robin"; 1141 1142 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */ 1143 1144 gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>, /* 70 */ 1145 <&gpio3 9 GPIO_ACTIVE_HIGH>, /* 73 */ 1146 <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */ 1147 <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */ 1148 <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */ 1149 gpio-names = "cmt_apeslpx", 1150 "cmt_rst_rq", 1151 "cmt_en", 1152 "cmt_rst", 1153 "cmt_bsi"; 1154 }; 1155}; 1156 1157&ssi_port2 { 1158 status = "disabled"; 1159}; 1160