1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include "omap3-gta04a5.dts" 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring model = "Goldelico GTA04A5/Letux 2804 with OneNAND"; 10*724ba675SRob Herring}; 11*724ba675SRob Herring 12*724ba675SRob Herring&omap3_pmx_core { 13*724ba675SRob Herring gpmc_pins: gpmc-pins { 14*724ba675SRob Herring pinctrl-single,pins = < 15*724ba675SRob Herring 16*724ba675SRob Herring /* address lines */ 17*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */ 18*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */ 19*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */ 20*724ba675SRob Herring 21*724ba675SRob Herring /* data lines, gpmc_d0..d7 not muxable according to TRM */ 22*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */ 23*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */ 24*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */ 25*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */ 26*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */ 27*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */ 28*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */ 29*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */ 30*724ba675SRob Herring 31*724ba675SRob Herring /* 32*724ba675SRob Herring * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable 33*724ba675SRob Herring * according to TRM. OneNAND seems to require PIN_INPUT on clock. 34*724ba675SRob Herring */ 35*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */ 36*724ba675SRob Herring OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ 37*724ba675SRob Herring >; 38*724ba675SRob Herring }; 39*724ba675SRob Herring}; 40*724ba675SRob Herring 41*724ba675SRob Herring&gpmc { 42*724ba675SRob Herring /* switch inherited setup to OneNAND */ 43*724ba675SRob Herring 44*724ba675SRob Herring ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ 45*724ba675SRob Herring pinctrl-names = "default"; 46*724ba675SRob Herring pinctrl-0 = <&gpmc_pins>; 47*724ba675SRob Herring 48*724ba675SRob Herring /delete-node/ nand@0,0; 49*724ba675SRob Herring 50*724ba675SRob Herring onenand@0,0 { 51*724ba675SRob Herring 52*724ba675SRob Herring #address-cells = <1>; 53*724ba675SRob Herring #size-cells = <1>; 54*724ba675SRob Herring compatible = "ti,omap2-onenand"; 55*724ba675SRob Herring reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ 56*724ba675SRob Herring 57*724ba675SRob Herring gpmc,sync-read; 58*724ba675SRob Herring gpmc,sync-write; 59*724ba675SRob Herring gpmc,burst-length = <16>; 60*724ba675SRob Herring gpmc,burst-read; 61*724ba675SRob Herring gpmc,burst-wrap; 62*724ba675SRob Herring gpmc,burst-write; 63*724ba675SRob Herring gpmc,device-width = <2>; 64*724ba675SRob Herring gpmc,mux-add-data = <2>; 65*724ba675SRob Herring gpmc,cs-on-ns = <0>; 66*724ba675SRob Herring gpmc,cs-rd-off-ns = <87>; 67*724ba675SRob Herring gpmc,cs-wr-off-ns = <87>; 68*724ba675SRob Herring gpmc,adv-on-ns = <0>; 69*724ba675SRob Herring gpmc,adv-rd-off-ns = <10>; 70*724ba675SRob Herring gpmc,adv-wr-off-ns = <10>; 71*724ba675SRob Herring gpmc,oe-on-ns = <15>; 72*724ba675SRob Herring gpmc,oe-off-ns = <87>; 73*724ba675SRob Herring gpmc,we-on-ns = <0>; 74*724ba675SRob Herring gpmc,we-off-ns = <87>; 75*724ba675SRob Herring gpmc,rd-cycle-ns = <112>; 76*724ba675SRob Herring gpmc,wr-cycle-ns = <112>; 77*724ba675SRob Herring gpmc,access-ns = <81>; 78*724ba675SRob Herring gpmc,page-burst-access-ns = <15>; 79*724ba675SRob Herring gpmc,bus-turnaround-ns = <0>; 80*724ba675SRob Herring gpmc,cycle2cycle-delay-ns = <0>; 81*724ba675SRob Herring gpmc,wait-monitoring-ns = <0>; 82*724ba675SRob Herring gpmc,clk-activation-ns = <5>; 83*724ba675SRob Herring gpmc,wr-data-mux-bus-ns = <30>; 84*724ba675SRob Herring gpmc,wr-access-ns = <81>; 85*724ba675SRob Herring gpmc,sync-clk-ps = <15000>; 86*724ba675SRob Herring 87*724ba675SRob Herring x-loader@0 { 88*724ba675SRob Herring label = "X-Loader"; 89*724ba675SRob Herring reg = <0 0x80000>; 90*724ba675SRob Herring }; 91*724ba675SRob Herring 92*724ba675SRob Herring bootloaders@80000 { 93*724ba675SRob Herring label = "U-Boot"; 94*724ba675SRob Herring reg = <0x80000 0x1c0000>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring 97*724ba675SRob Herring bootloaders_env@240000 { 98*724ba675SRob Herring label = "U-Boot Env"; 99*724ba675SRob Herring reg = <0x240000 0x40000>; 100*724ba675SRob Herring }; 101*724ba675SRob Herring 102*724ba675SRob Herring kernel@280000 { 103*724ba675SRob Herring label = "Kernel"; 104*724ba675SRob Herring reg = <0x280000 0x600000>; 105*724ba675SRob Herring }; 106*724ba675SRob Herring 107*724ba675SRob Herring filesystem@880000 { 108*724ba675SRob Herring label = "File System"; 109*724ba675SRob Herring reg = <0x880000 0>; /* 0 = MTDPART_SIZ_FULL */ 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring }; 113*724ba675SRob Herring}; 114