1// SPDX-License-Identifier: GPL-2.0-only 2 3#include <dt-bindings/input/input.h> 4 5/ { 6 cpus { 7 cpu@0 { 8 cpu0-supply = <&vcc>; 9 }; 10 }; 11 12 memory@80000000 { 13 device_type = "memory"; 14 reg = <0x80000000 0>; 15 }; 16 17 wl12xx_vmmc: wl12xx_vmmc { 18 compatible = "regulator-fixed"; 19 regulator-name = "vwl1271"; 20 regulator-min-microvolt = <1800000>; 21 regulator-max-microvolt = <1800000>; 22 gpio = <&gpio1 3 0>; /* gpio_3 */ 23 startup-delay-us = <70000>; 24 enable-active-high; 25 vin-supply = <&vaux3>; 26 }; 27 28 /* HS USB Host PHY on PORT 1 */ 29 hsusb2_phy: hsusb2_phy { 30 pinctrl-names = "default"; 31 pinctrl-0 = <&hsusb2_reset_pin>; 32 compatible = "usb-nop-xceiv"; 33 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */ 34 #phy-cells = <0>; 35 }; 36 37 /* fixed 26MHz oscillator */ 38 hfclk_26m: oscillator { 39 #clock-cells = <0>; 40 compatible = "fixed-clock"; 41 clock-frequency = <26000000>; 42 }; 43}; 44 45&gpmc { 46 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ 47 48 nand@0,0 { 49 compatible = "ti,omap2-nand"; 50 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 51 interrupt-parent = <&gpmc>; 52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53 <1 IRQ_TYPE_NONE>; /* termcount */ 54 linux,mtd-name = "micron,mt29f4g16abbda3w"; 55 nand-bus-width = <16>; 56 ti,nand-ecc-opt = "bch8"; 57 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 58 gpmc,sync-clk-ps = <0>; 59 gpmc,cs-on-ns = <0>; 60 gpmc,cs-rd-off-ns = <44>; 61 gpmc,cs-wr-off-ns = <44>; 62 gpmc,adv-on-ns = <6>; 63 gpmc,adv-rd-off-ns = <34>; 64 gpmc,adv-wr-off-ns = <44>; 65 gpmc,we-off-ns = <40>; 66 gpmc,oe-off-ns = <54>; 67 gpmc,access-ns = <64>; 68 gpmc,rd-cycle-ns = <82>; 69 gpmc,wr-cycle-ns = <82>; 70 gpmc,wr-access-ns = <40>; 71 gpmc,wr-data-mux-bus-ns = <0>; 72 gpmc,device-width = <2>; 73 #address-cells = <1>; 74 #size-cells = <1>; 75 }; 76}; 77 78&i2c1 { 79 pinctrl-names = "default"; 80 pinctrl-0 = <&i2c1_pins>; 81 clock-frequency = <2600000>; 82 83 twl: twl@48 { 84 reg = <0x48>; 85 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 86 interrupt-parent = <&intc>; 87 clocks = <&hfclk_26m>; 88 clock-names = "fck"; 89 twl_audio: audio { 90 compatible = "ti,twl4030-audio"; 91 codec { 92 ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; 93 }; 94 }; 95 }; 96}; 97 98&i2c2 { 99 pinctrl-names = "default"; 100 pinctrl-0 = <&i2c2_pins>; 101 clock-frequency = <400000>; 102}; 103 104&i2c3 { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&i2c3_pins>; 107 clock-frequency = <400000>; 108 109 touchscreen: tsc2004@48 { 110 compatible = "ti,tsc2004"; 111 reg = <0x48>; 112 vio-supply = <&vaux1>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&tsc2004_pins>; 115 interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */ 116 117 touchscreen-fuzz-x = <4>; 118 touchscreen-fuzz-y = <7>; 119 touchscreen-fuzz-pressure = <2>; 120 touchscreen-size-x = <4096>; 121 touchscreen-size-y = <4096>; 122 touchscreen-max-pressure = <2048>; 123 124 ti,x-plate-ohms = <280>; 125 ti,esd-recovery-timeout-ms = <8000>; 126 }; 127}; 128 129&mmc3 { 130 interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>; 131 pinctrl-0 = <&mmc3_pins &wl127x_gpio>; 132 pinctrl-names = "default"; 133 vmmc-supply = <&wl12xx_vmmc>; 134 non-removable; 135 bus-width = <4>; 136 cap-power-off-card; 137 #address-cells = <1>; 138 #size-cells = <0>; 139 wlcore: wlcore@2 { 140 compatible = "ti,wl1273"; 141 reg = <2>; 142 interrupt-parent = <&gpio1>; 143 interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */ 144 ref-clock-frequency = <26000000>; 145 }; 146}; 147 148&usbhshost { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&hsusb2_pins>; 151 port2-mode = "ehci-phy"; 152}; 153 154&usbhsehci { 155 phys = <0 &hsusb2_phy>; 156}; 157 158&omap3_pmx_core { 159 160 mmc3_pins: mm3-pins { 161 pinctrl-single,pins = < 162 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */ 163 OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */ 164 OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */ 165 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */ 166 OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */ 167 OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */ 168 >; 169 }; 170 mcbsp2_pins: mcbsp2-pins { 171 pinctrl-single,pins = < 172 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ 173 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */ 174 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */ 175 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */ 176 >; 177 }; 178 uart2_pins: uart2-pins { 179 pinctrl-single,pins = < 180 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ 181 OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ 182 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ 183 OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ 184 OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ 185 >; 186 }; 187 mcspi1_pins: mcspi1-pins { 188 pinctrl-single,pins = < 189 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ 190 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ 191 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ 192 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ 193 >; 194 }; 195 196 hsusb2_pins: hsusb2-pins { 197 pinctrl-single,pins = < 198 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */ 199 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */ 200 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */ 201 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */ 202 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */ 203 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */ 204 >; 205 }; 206 207 hsusb_otg_pins: hsusb-otg-pins { 208 pinctrl-single,pins = < 209 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ 210 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ 211 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ 212 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ 213 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */ 214 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ 215 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ 216 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */ 217 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */ 218 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */ 219 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */ 220 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ 221 >; 222 }; 223 224 i2c1_pins: i2c1-pins { 225 pinctrl-single,pins = < 226 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 227 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 228 OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */ 229 >; 230 }; 231 232 i2c2_pins: i2c2-pins { 233 pinctrl-single,pins = < 234 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */ 235 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */ 236 >; 237 }; 238 239 i2c3_pins: i2c3-pins { 240 pinctrl-single,pins = < 241 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */ 242 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */ 243 >; 244 }; 245 246 tsc2004_pins: tsc2004-pins { 247 pinctrl-single,pins = < 248 OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */ 249 >; 250 }; 251}; 252 253&omap3_pmx_wkup { 254 255 hsusb2_reset_pin: hsusb1-reset-pins { 256 pinctrl-single,pins = < 257 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */ 258 >; 259 }; 260 wl127x_gpio: wl127x-gpio-pins { 261 pinctrl-single,pins = < 262 OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */ 263 OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */ 264 >; 265 }; 266}; 267 268&uart2 { 269 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&uart2_pins>; 272}; 273 274&mcspi1 { 275 pinctrl-names = "default"; 276 pinctrl-0 = <&mcspi1_pins>; 277}; 278 279#include "twl4030.dtsi" 280#include "twl4030_omap3.dtsi" 281 282&vaux3 { 283 regulator-min-microvolt = <2800000>; 284 regulator-max-microvolt = <2800000>; 285}; 286 287&twl { 288 twl_power: power { 289 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle"; 290 ti,use_poweroff; 291 }; 292}; 293 294&twl_gpio { 295 ti,use-leds; 296}; 297