1// SPDX-License-Identifier: GPL-2.0-only 2/dts-v1/; 3 4#include "dra62x.dtsi" 5#include <dt-bindings/interrupt-controller/irq.h> 6 7/ { 8 model = "DRA62x J5 Eco EVM"; 9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814"; 10 11 memory@80000000 { 12 device_type = "memory"; 13 reg = <0x80000000 0x40000000>; /* 1 GB */ 14 }; 15 16 /* MIC94060YC6 controlled by SD1_POW pin */ 17 vmmcsd_fixed: fixedregulator0 { 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 22 }; 23}; 24 25&cpsw_emac0 { 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; 28}; 29 30&cpsw_emac1 { 31 phy-handle = <ðphy1>; 32 phy-mode = "rgmii-id"; 33}; 34 35&davinci_mdio { 36 ethphy0: ethernet-phy@0 { 37 reg = <0>; 38 }; 39 40 ethphy1: ethernet-phy@1 { 41 reg = <1>; 42 }; 43}; 44 45&gpmc { 46 ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ 47 48 nand@0,0 { 49 compatible = "ti,omap2-nand"; 50 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 51 interrupt-parent = <&gpmc>; 52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53 <1 IRQ_TYPE_NONE>; /* termcount */ 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ti,nand-ecc-opt = "bch8"; 57 nand-bus-width = <16>; 58 gpmc,device-width = <2>; 59 gpmc,sync-clk-ps = <0>; 60 gpmc,cs-on-ns = <0>; 61 gpmc,cs-rd-off-ns = <44>; 62 gpmc,cs-wr-off-ns = <44>; 63 gpmc,adv-on-ns = <6>; 64 gpmc,adv-rd-off-ns = <34>; 65 gpmc,adv-wr-off-ns = <44>; 66 gpmc,we-on-ns = <0>; 67 gpmc,we-off-ns = <40>; 68 gpmc,oe-on-ns = <0>; 69 gpmc,oe-off-ns = <54>; 70 gpmc,access-ns = <64>; 71 gpmc,rd-cycle-ns = <82>; 72 gpmc,wr-cycle-ns = <82>; 73 gpmc,bus-turnaround-ns = <0>; 74 gpmc,cycle2cycle-delay-ns = <0>; 75 gpmc,clk-activation-ns = <0>; 76 gpmc,wr-access-ns = <40>; 77 gpmc,wr-data-mux-bus-ns = <0>; 78 partition@0 { 79 label = "X-Loader"; 80 reg = <0 0x80000>; 81 }; 82 partition@80000 { 83 label = "U-Boot"; 84 reg = <0x80000 0x1c0000>; 85 }; 86 partition@1c0000 { 87 label = "Environment"; 88 reg = <0x240000 0x40000>; 89 }; 90 partition@280000 { 91 label = "Kernel"; 92 reg = <0x280000 0x500000>; 93 }; 94 partition@780000 { 95 label = "Filesystem"; 96 reg = <0x780000 0xf880000>; 97 }; 98 }; 99}; 100 101&mmc2 { 102 pinctrl-names = "default"; 103 pinctrl-0 = <&sd1_pins>; 104 vmmc-supply = <&vmmcsd_fixed>; 105 bus-width = <4>; 106 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; 107}; 108 109&pincntl { 110 sd1_pins: sd1-pins { 111 pinctrl-single,pins = < 112 DM814X_IOPAD(0x0800, PIN_INPUT | 0x1) /* SD1_CLK */ 113 DM814X_IOPAD(0x0804, PIN_INPUT_PULLUP | 0x1) /* SD1_CMD */ 114 DM814X_IOPAD(0x0808, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[0] */ 115 DM814X_IOPAD(0x080c, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[1] */ 116 DM814X_IOPAD(0x0810, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[2] */ 117 DM814X_IOPAD(0x0814, PIN_INPUT_PULLUP | 0x1) /* SD1_DAT[3] */ 118 DM814X_IOPAD(0x0924, PIN_OUTPUT | 0x40) /* SD1_POW */ 119 DM814X_IOPAD(0x093C, PIN_INPUT_PULLUP | 0x80) /* GP1[6] */ 120 >; 121 }; 122 123 usb0_pins: usb0-pins { 124 pinctrl-single,pins = < 125 DM814X_IOPAD(0x0c34, PIN_OUTPUT | 0x1) /* USB0_DRVVBUS */ 126 >; 127 }; 128}; 129 130/* USB0_ID pin state: SW10[1] = 0 cable detection, SW10[1] = 1 ID grounded */ 131&usb0 { 132 pinctrl-names = "default"; 133 pinctrl-0 = <&usb0_pins>; 134 dr_mode = "otg"; 135}; 136 137&usb1_phy { 138 status = "disabled"; 139}; 140 141&usb1 { 142 status = "disabled"; 143}; 144