1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 4 */ 5 6/dts-v1/; 7 8#include "am4372.dtsi" 9#include <dt-bindings/pinctrl/am43xx.h> 10#include <dt-bindings/pwm/pwm.h> 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13 14/ { 15 model = "TI AM437x Industrial Development Kit"; 16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; 17 18 chosen { 19 stdout-path = &uart0; 20 }; 21 22 v24_0d: fixed-regulator-v24_0d { 23 compatible = "regulator-fixed"; 24 regulator-name = "V24_0D"; 25 regulator-min-microvolt = <24000000>; 26 regulator-max-microvolt = <24000000>; 27 regulator-always-on; 28 regulator-boot-on; 29 }; 30 31 v3_3d: fixed-regulator-v3_3d { 32 compatible = "regulator-fixed"; 33 regulator-name = "V3_3D"; 34 regulator-min-microvolt = <3300000>; 35 regulator-max-microvolt = <3300000>; 36 regulator-always-on; 37 regulator-boot-on; 38 vin-supply = <&v24_0d>; 39 }; 40 41 vdd_corereg: fixed-regulator-vdd_corereg { 42 compatible = "regulator-fixed"; 43 regulator-name = "VDD_COREREG"; 44 regulator-min-microvolt = <1100000>; 45 regulator-max-microvolt = <1100000>; 46 regulator-always-on; 47 regulator-boot-on; 48 vin-supply = <&v24_0d>; 49 }; 50 51 vdd_core: fixed-regulator-vdd_core { 52 compatible = "regulator-fixed"; 53 regulator-name = "VDD_CORE"; 54 regulator-min-microvolt = <1100000>; 55 regulator-max-microvolt = <1100000>; 56 regulator-always-on; 57 regulator-boot-on; 58 vin-supply = <&vdd_corereg>; 59 }; 60 61 v1_8dreg: fixed-regulator-v1_8dreg{ 62 compatible = "regulator-fixed"; 63 regulator-name = "V1_8DREG"; 64 regulator-min-microvolt = <1800000>; 65 regulator-max-microvolt = <1800000>; 66 regulator-always-on; 67 regulator-boot-on; 68 vin-supply = <&v24_0d>; 69 }; 70 71 v1_8d: fixed-regulator-v1_8d{ 72 compatible = "regulator-fixed"; 73 regulator-name = "V1_8D"; 74 regulator-min-microvolt = <1800000>; 75 regulator-max-microvolt = <1800000>; 76 regulator-always-on; 77 regulator-boot-on; 78 vin-supply = <&v1_8dreg>; 79 }; 80 81 v1_5dreg: fixed-regulator-v1_5dreg{ 82 compatible = "regulator-fixed"; 83 regulator-name = "V1_5DREG"; 84 regulator-min-microvolt = <1500000>; 85 regulator-max-microvolt = <1500000>; 86 regulator-always-on; 87 regulator-boot-on; 88 vin-supply = <&v24_0d>; 89 }; 90 91 v1_5d: fixed-regulator-v1_5d{ 92 compatible = "regulator-fixed"; 93 regulator-name = "V1_5D"; 94 regulator-min-microvolt = <1500000>; 95 regulator-max-microvolt = <1500000>; 96 regulator-always-on; 97 regulator-boot-on; 98 vin-supply = <&v1_5dreg>; 99 }; 100 101 gpio_keys: gpio-keys { 102 compatible = "gpio-keys"; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&gpio_keys_pins_default>; 105 106 switch-0 { 107 label = "power-button"; 108 linux,code = <KEY_POWER>; 109 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 110 }; 111 }; 112 113 /* fixed 32k external oscillator clock */ 114 clk_32k_rtc: clk_32k_rtc { 115 #clock-cells = <0>; 116 compatible = "fixed-clock"; 117 clock-frequency = <32768>; 118 }; 119 120 leds-iio { 121 status = "disabled"; 122 compatible = "gpio-leds"; 123 led-out0 { 124 label = "out0"; 125 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 126 default-state = "off"; 127 }; 128 129 led-out1 { 130 label = "out1"; 131 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>; 132 default-state = "off"; 133 }; 134 135 led-out2 { 136 label = "out2"; 137 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>; 138 default-state = "off"; 139 }; 140 141 led-out3 { 142 label = "out3"; 143 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>; 144 default-state = "off"; 145 }; 146 147 led-out4 { 148 label = "out4"; 149 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>; 150 default-state = "off"; 151 }; 152 153 led-out5 { 154 label = "out5"; 155 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>; 156 default-state = "off"; 157 }; 158 159 led-out6 { 160 label = "out6"; 161 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>; 162 default-state = "off"; 163 }; 164 165 led-out7 { 166 label = "out7"; 167 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>; 168 default-state = "off"; 169 }; 170 }; 171}; 172 173&am43xx_pinmux { 174 gpio_keys_pins_default: gpio-keys-default-pins { 175 pinctrl-single,pins = < 176 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ 177 >; 178 }; 179 180 i2c0_pins_default: i2c0-default-pins { 181 pinctrl-single,pins = < 182 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 183 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 184 >; 185 }; 186 187 i2c0_pins_sleep: i2c0-sleep-pins { 188 pinctrl-single,pins = < 189 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) 190 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7) 191 >; 192 }; 193 194 i2c2_pins_default: i2c2-default-pins { 195 pinctrl-single,pins = < 196 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ 197 AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ 198 >; 199 }; 200 201 i2c2_pins_sleep: i2c2-sleep-pins { 202 pinctrl-single,pins = < 203 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7) 204 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7) 205 >; 206 }; 207 208 mmc1_pins_default: mmc1-default-pins { 209 pinctrl-single,pins = < 210 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 211 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 212 AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 213 AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 214 AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 215 AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 216 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 217 >; 218 }; 219 220 mmc1_pins_sleep: mmc1-sleep-pins { 221 pinctrl-single,pins = < 222 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7) 223 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7) 224 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) 225 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) 226 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) 227 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) 228 AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7) 229 >; 230 }; 231 232 spi1_pins_default: spi1-default-pins { 233 pinctrl-single,pins = < 234 AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2) /* mii1_col.spi1_sclk */ 235 AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2) /* mii1_rx_er.spi1_d1 */ 236 AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2) /* rmii1_ref_clk.spi1_cs0 */ 237 AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7) /* mii1_crs.gpio3_1 */ 238 >; 239 }; 240 241 spi1_pins_sleep: spi1-sleep-pins { 242 pinctrl-single,pins = < 243 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7) 244 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7) 245 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) 246 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7) 247 >; 248 }; 249 250 ecap0_pins_default: backlight-default-pins { 251 pinctrl-single,pins = < 252 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ 253 >; 254 }; 255 256 cpsw_default: cpsw-default-pins { 257 pinctrl-single,pins = < 258 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 259 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 260 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 261 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 262 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 263 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 264 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 265 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 266 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 267 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 268 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 269 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 270 >; 271 }; 272 273 cpsw_sleep: cpsw-sleep-pins { 274 pinctrl-single,pins = < 275 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7) 276 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7) 277 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7) 278 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) 279 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7) 280 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7) 281 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7) 282 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7) 283 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7) 284 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7) 285 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) 286 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) 287 >; 288 }; 289 290 davinci_mdio_default: davinci-mdio-default-pins { 291 pinctrl-single,pins = < 292 /* MDIO */ 293 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 294 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 295 >; 296 }; 297 298 davinci_mdio_sleep: davinci-mdio-sleep-pins { 299 pinctrl-single,pins = < 300 /* MDIO reset value */ 301 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) 302 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) 303 >; 304 }; 305 306 qspi_pins_default: qspi-default-pins { 307 pinctrl-single,pins = < 308 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 309 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 310 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 311 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 312 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 313 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 314 >; 315 }; 316 317 qspi_pins_sleep: qspi-sleep-pins { 318 pinctrl-single,pins = < 319 AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7) 320 AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) 321 AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) 322 AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) 323 AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7) 324 AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) 325 >; 326 }; 327}; 328 329&i2c0 { 330 status = "okay"; 331 pinctrl-names = "default", "sleep"; 332 pinctrl-0 = <&i2c0_pins_default>; 333 pinctrl-1 = <&i2c0_pins_sleep>; 334 clock-frequency = <400000>; 335 336 at24@50 { 337 compatible = "atmel,24c256"; 338 pagesize = <64>; 339 reg = <0x50>; 340 }; 341 342 tps: tps62362@60 { 343 compatible = "ti,tps62362"; 344 reg = <0x60>; 345 regulator-name = "VDD_MPU"; 346 regulator-min-microvolt = <950000>; 347 regulator-max-microvolt = <1330000>; 348 regulator-boot-on; 349 regulator-always-on; 350 ti,vsel0-state-high; 351 ti,vsel1-state-high; 352 vin-supply = <&v3_3d>; 353 }; 354}; 355 356&i2c2 { 357 status = "okay"; 358 pinctrl-names = "default", "sleep"; 359 pinctrl-0 = <&i2c2_pins_default>; 360 pinctrl-1 = <&i2c2_pins_sleep>; 361 clock-frequency = <100000>; 362 363 tpic2810: tpic2810@60 { 364 compatible = "ti,tpic2810"; 365 reg = <0x60>; 366 gpio-controller; 367 #gpio-cells = <2>; 368 }; 369}; 370 371&spi1 { 372 status = "okay"; 373 pinctrl-names = "default", "sleep"; 374 pinctrl-0 = <&spi1_pins_default>; 375 pinctrl-1 = <&spi1_pins_sleep>; 376 ti,pindir-d0-out-d1-in; 377 378 sn65hvs882: sn65hvs882@0 { 379 compatible = "pisosr-gpio"; 380 gpio-controller; 381 #gpio-cells = <2>; 382 383 load-gpios = <&gpio3 1 GPIO_ACTIVE_LOW>; 384 385 reg = <0>; 386 spi-max-frequency = <1000000>; 387 spi-cpol; 388 }; 389}; 390 391&epwmss0 { 392 status = "okay"; 393}; 394 395&ecap0 { 396 status = "okay"; 397 pinctrl-names = "default"; 398 pinctrl-0 = <&ecap0_pins_default>; 399}; 400 401&gpio0 { 402 status = "okay"; 403}; 404 405&gpio1 { 406 status = "okay"; 407}; 408 409&gpio3 { 410 status = "okay"; 411}; 412 413&gpio4 { 414 status = "okay"; 415}; 416 417&gpio5 { 418 status = "okay"; 419}; 420 421&mmc1 { 422 status = "okay"; 423 pinctrl-names = "default", "sleep"; 424 pinctrl-0 = <&mmc1_pins_default>; 425 pinctrl-1 = <&mmc1_pins_sleep>; 426 vmmc-supply = <&v3_3d>; 427 bus-width = <4>; 428 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 429}; 430 431&qspi { 432 status = "okay"; 433 pinctrl-names = "default", "sleep"; 434 pinctrl-0 = <&qspi_pins_default>; 435 pinctrl-1 = <&qspi_pins_sleep>; 436 437 spi-max-frequency = <48000000>; 438 flash@0 { 439 compatible = "mx66l51235l"; 440 spi-max-frequency = <48000000>; 441 reg = <0>; 442 spi-cpol; 443 spi-cpha; 444 spi-tx-bus-width = <1>; 445 spi-rx-bus-width = <4>; 446 #address-cells = <1>; 447 #size-cells = <1>; 448 449 /* 450 * MTD partition table. The ROM checks the first 512KiB for a 451 * valid file to boot(XIP). 452 */ 453 partition@0 { 454 label = "QSPI.U_BOOT"; 455 reg = <0x00000000 0x00080000>; 456 }; 457 partition@1 { 458 label = "QSPI.U_BOOT.backup"; 459 reg = <0x00080000 0x00080000>; 460 }; 461 partition@2 { 462 label = "QSPI.U-BOOT-SPL_OS"; 463 reg = <0x00100000 0x00010000>; 464 }; 465 partition@3 { 466 label = "QSPI.U_BOOT_ENV"; 467 reg = <0x00110000 0x00010000>; 468 }; 469 partition@4 { 470 label = "QSPI.U-BOOT-ENV.backup"; 471 reg = <0x00120000 0x00010000>; 472 }; 473 partition@5 { 474 label = "QSPI.KERNEL"; 475 reg = <0x00130000 0x0800000>; 476 }; 477 partition@6 { 478 label = "QSPI.FILESYSTEM"; 479 reg = <0x00930000 0x36D0000>; 480 }; 481 }; 482}; 483 484&mac_sw { 485 pinctrl-names = "default", "sleep"; 486 pinctrl-0 = <&cpsw_default>; 487 pinctrl-1 = <&cpsw_sleep>; 488 status = "okay"; 489}; 490 491&davinci_mdio_sw { 492 pinctrl-names = "default", "sleep"; 493 pinctrl-0 = <&davinci_mdio_default>; 494 pinctrl-1 = <&davinci_mdio_sleep>; 495 496 ethphy0: ethernet-phy@0 { 497 reg = <0>; 498 }; 499}; 500 501&cpsw_port1 { 502 phy-handle = <ðphy0>; 503 phy-mode = "rgmii-rxid"; 504 ti,dual-emac-pvid = <1>; 505}; 506 507&cpsw_port2 { 508 status = "disabled"; 509}; 510 511&rtc { 512 clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 513 clock-names = "ext-clk", "int-clk"; 514 status = "okay"; 515}; 516 517&wdt { 518 status = "okay"; 519}; 520 521&cpu { 522 cpu0-supply = <&tps>; 523}; 524 525&cpu0_opp_table { 526 /* 527 * Supply voltage supervisor on board will not allow opp50 so 528 * disable it and set opp100 as suspend OPP. 529 */ 530 opp50-300000000 { 531 status = "disabled"; 532 }; 533 534 opp100-600000000 { 535 opp-suspend; 536 }; 537}; 538 539&pruss1_mdio { 540 status = "disabled"; 541}; 542