xref: /linux/arch/arm/boot/dts/ti/omap/am3517-som.dtsi (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com>
4 *
5 * Based on am3517-evm.dts
6 */
7
8/ {
9	cpus {
10		cpu@0 {
11			cpu0-supply = <&vdd_core_reg>;
12		};
13	};
14
15	wl12xx_buffer: wl12xx_buf {
16		compatible = "regulator-fixed";
17		regulator-name = "wl1271_buf";
18		regulator-min-microvolt = <1800000>;
19		regulator-max-microvolt = <1800000>;
20		pinctrl-names = "default";
21		pinctrl-0 = <&wl12xx_buffer_pins>;
22		gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
23		regulator-always-on;
24		vin-supply = <&vdd_1v8_reg>;
25	};
26
27	wl12xx_vmmc2: wl12xx_vmmc2 {
28		compatible = "regulator-fixed";
29		regulator-name = "vwl1271";
30		regulator-min-microvolt = <1800000>;
31		regulator-max-microvolt = <1800000>;
32		pinctrl-names = "default";
33		pinctrl-0 = <&wl12xx_wkup_pins>;
34		gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
35		startup-delay-us = <70000>;
36		enable-active-high;
37		regulator-always-on;
38		vin-supply = <&wl12xx_buffer>;
39	};
40};
41
42&gpmc {
43	ranges = <0 0 0x30000000 0x1000000>;	/* CS0: 16MB for NAND */
44
45	nand@0,0 {
46		compatible = "ti,omap2-nand";
47		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
48		nand-bus-width = <16>;
49		ti,nand-ecc-opt = "bch8";
50		gpmc,sync-clk-ps = <0>;
51		gpmc,cs-on-ns = <0>;
52		gpmc,cs-rd-off-ns = <44>;
53		gpmc,cs-wr-off-ns = <44>;
54		gpmc,adv-on-ns = <6>;
55		gpmc,adv-rd-off-ns = <34>;
56		gpmc,adv-wr-off-ns = <44>;
57		gpmc,we-off-ns = <40>;
58		gpmc,oe-off-ns = <54>;
59		gpmc,access-ns = <64>;
60		gpmc,rd-cycle-ns = <82>;
61		gpmc,wr-cycle-ns = <82>;
62		gpmc,wr-access-ns = <40>;
63		gpmc,wr-data-mux-bus-ns = <0>;
64		gpmc,device-width = <2>;
65		#address-cells = <1>;
66		#size-cells = <1>;
67	};
68};
69
70&i2c1 {
71	pinctrl-names = "default";
72	pinctrl-0 = <&i2c1_pins>;
73	clock-frequency = <400000>;
74
75	s35390a: s35390a@30 {
76		compatible = "sii,s35390a";
77		reg = <0x30>;
78
79		pinctrl-names = "default";
80		pinctrl-0 = <&rtc_pins>;
81		interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
82	};
83
84	tps: tps65023@48 {
85		compatible = "ti,tps65023";
86		reg = <0x48>;
87
88		regulators {
89			vdd_core_reg: VDCDC1 {
90				regulator-name = "vdd_core";
91				regulator-always-on;
92				regulator-min-microvolt = <1200000>;
93				regulator-max-microvolt = <1200000>;
94			};
95
96			vdd_io_reg: VDCDC2 {
97				regulator-name = "vdd_io";
98				regulator-always-on;
99				regulator-min-microvolt = <3300000>;
100				regulator-max-microvolt = <3300000>;
101			};
102
103			vdd_1v8_reg: VDCDC3 {
104				regulator-name = "vdd_1v8";
105				regulator-always-on;
106				regulator-min-microvolt = <1800000>;
107				regulator-max-microvolt = <1800000>;
108			};
109
110			vdd_usb18_reg: LDO1 {
111				regulator-name = "vdd_usb18";
112				regulator-always-on;
113				regulator-min-microvolt = <1800000>;
114				regulator-max-microvolt = <1800000>;
115			};
116
117			vdd_usb33_reg: LDO2 {
118				regulator-name = "vdd_usb33";
119				regulator-always-on;
120				regulator-min-microvolt = <3300000>;
121				regulator-max-microvolt = <3300000>;
122			};
123		};
124	};
125
126	touchscreen: tsc2004@4b {
127		compatible = "ti,tsc2004";
128		reg = <0x4b>;
129
130		vio-supply = <&vdd_io_reg>;
131
132		pinctrl-names = "default";
133		pinctrl-0 = <&tsc2004_pins>;
134		interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
135
136		touchscreen-fuzz-x = <4>;
137		touchscreen-fuzz-y = <7>;
138		touchscreen-fuzz-pressure = <2>;
139		touchscreen-size-x = <480>;
140		touchscreen-size-y = <272>;
141		touchscreen-max-pressure = <2048>;
142
143		ti,x-plate-ohms = <280>;
144		ti,esd-recovery-timeout-ms = <8000>;
145	};
146};
147
148&mmc2 {
149	interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
150
151	status = "okay";
152	pinctrl-names = "default";
153	pinctrl-0 = <&mmc2_pins>;
154	vmmc-supply = <&wl12xx_vmmc2>;
155	non-removable;
156	bus-width = <4>;
157	cap-power-off-card;
158	#address-cells = <1>;
159	#size-cells = <0>;
160	wlcore: wlcore@2 {
161		compatible = "ti,wl1271";
162		reg = <2>;
163		interrupt-parent = <&gpio6>;
164		interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
165		ref-clock-frequency = <26000000>;
166		tcxo-clock-frequency = <26000000>;
167	};
168};
169
170&uart2 {
171	pinctrl-names = "default";
172	pinctrl-0 = <&uart2_pins>;
173
174	bluetooth {
175		compatible = "ti,wl1271-st";
176		enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
177		max-speed = <3000000>;
178	};
179};
180
181&omap3_pmx_core {
182
183	i2c1_pins: i2c1-pins {
184		pinctrl-single,pins = <
185			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0)  /* i2c1_scl */
186			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0)  /* i2c1_sda */
187		>;
188	};
189
190	wl12xx_buffer_pins: wl12xx-buffer-pins {
191		pinctrl-single,pins = <
192			OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4)  /* mmc1_dat7.gpio_129 */
193		>;
194	};
195
196	mmc2_pins: mmc2-pins {
197		pinctrl-single,pins = <
198			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_clk.mmc2_clk */
199			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_cmd.mmc2_cmd */
200			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat0.mmc2_dat0 */
201			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat1.mmc2_dat1 */
202			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat2.mmc2_dat2 */
203			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat3.mmc2_dat3 */
204			OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
205			OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
206			OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
207			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
208			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4)	/* hdq_sio.gpio_170 */
209		>;
210	};
211
212	rtc_pins: rtc-pins {
213		pinctrl-single,pins = <
214			OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
215		>;
216	};
217
218	tsc2004_pins: tsc2004-pins {
219		pinctrl-single,pins = <
220			OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
221		>;
222	};
223
224	uart2_pins: uart2-pins {
225		pinctrl-single,pins = <
226			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)		/* uart2_cts */
227			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* uart2_rts */
228			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx */
229			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx */
230			OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0)		/* gpio_56 */
231		>;
232	};
233};
234
235&omap3_pmx_wkup {
236
237	wl12xx_wkup_pins: wl12xx-wkup-pins {
238		pinctrl-single,pins = <
239			OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)	/* sys_boot1.gpio_3 */
240		>;
241	};
242};
243