1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/display/tda998x.h> 7*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 8*724ba675SRob Herring 9*724ba675SRob Herring&am33xx_pinmux { 10*724ba675SRob Herring nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins { 11*724ba675SRob Herring pinctrl-single,pins = < 12*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 13*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) 14*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) 15*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) 16*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) 17*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) 18*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) 19*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) 20*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) 21*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) 22*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) 23*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) 24*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) 25*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) 26*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) 27*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) 28*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) 29*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 30*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 31*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 32*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 33*724ba675SRob Herring >; 34*724ba675SRob Herring }; 35*724ba675SRob Herring 36*724ba675SRob Herring nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins { 37*724ba675SRob Herring pinctrl-single,pins = < 38*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 39*724ba675SRob Herring >; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring mcasp0_pins: mcasp0-pins { 43*724ba675SRob Herring pinctrl-single,pins = < 44*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ 45*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ 46*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) 47*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 48*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ 49*724ba675SRob Herring >; 50*724ba675SRob Herring }; 51*724ba675SRob Herring}; 52*724ba675SRob Herring 53*724ba675SRob Herring&lcdc { 54*724ba675SRob Herring status = "okay"; 55*724ba675SRob Herring 56*724ba675SRob Herring /* If you want to get 24 bit RGB and 16 BGR mode instead of 57*724ba675SRob Herring * current 16 bit RGB and 24 BGR modes, set the propety 58*724ba675SRob Herring * below to "crossed" and uncomment the video-ports -property 59*724ba675SRob Herring * in tda19988 node. 60*724ba675SRob Herring */ 61*724ba675SRob Herring blue-and-red-wiring = "straight"; 62*724ba675SRob Herring 63*724ba675SRob Herring port { 64*724ba675SRob Herring lcdc_0: endpoint@0 { 65*724ba675SRob Herring remote-endpoint = <&hdmi_0>; 66*724ba675SRob Herring }; 67*724ba675SRob Herring }; 68*724ba675SRob Herring}; 69*724ba675SRob Herring 70*724ba675SRob Herring&i2c0 { 71*724ba675SRob Herring tda19988: tda19988@70 { 72*724ba675SRob Herring compatible = "nxp,tda998x"; 73*724ba675SRob Herring reg = <0x70>; 74*724ba675SRob Herring nxp,calib-gpios = <&gpio1 25 0>; 75*724ba675SRob Herring interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>; 76*724ba675SRob Herring 77*724ba675SRob Herring pinctrl-names = "default", "off"; 78*724ba675SRob Herring pinctrl-0 = <&nxp_hdmi_bonelt_pins>; 79*724ba675SRob Herring pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; 80*724ba675SRob Herring 81*724ba675SRob Herring /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ 82*724ba675SRob Herring /* video-ports = <0x234501>; */ 83*724ba675SRob Herring 84*724ba675SRob Herring #sound-dai-cells = <0>; 85*724ba675SRob Herring audio-ports = < TDA998x_I2S 0x03>; 86*724ba675SRob Herring 87*724ba675SRob Herring ports { 88*724ba675SRob Herring #address-cells = <1>; 89*724ba675SRob Herring #size-cells = <0>; 90*724ba675SRob Herring 91*724ba675SRob Herring port@0 { 92*724ba675SRob Herring reg = <0>; 93*724ba675SRob Herring 94*724ba675SRob Herring hdmi_0: endpoint { 95*724ba675SRob Herring remote-endpoint = <&lcdc_0>; 96*724ba675SRob Herring }; 97*724ba675SRob Herring }; 98*724ba675SRob Herring }; 99*724ba675SRob Herring }; 100*724ba675SRob Herring}; 101*724ba675SRob Herring 102*724ba675SRob Herring&mcasp0 { 103*724ba675SRob Herring #sound-dai-cells = <0>; 104*724ba675SRob Herring pinctrl-names = "default"; 105*724ba675SRob Herring pinctrl-0 = <&mcasp0_pins>; 106*724ba675SRob Herring status = "okay"; 107*724ba675SRob Herring op-mode = <0>; /* MCASP_IIS_MODE */ 108*724ba675SRob Herring tdm-slots = <2>; 109*724ba675SRob Herring serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 110*724ba675SRob Herring 0 0 1 0 111*724ba675SRob Herring >; 112*724ba675SRob Herring tx-num-evt = <32>; 113*724ba675SRob Herring rx-num-evt = <32>; 114*724ba675SRob Herring}; 115*724ba675SRob Herring 116*724ba675SRob Herring/ { 117*724ba675SRob Herring clk_mcasp0_fixed: clk_mcasp0_fixed { 118*724ba675SRob Herring #clock-cells = <0>; 119*724ba675SRob Herring compatible = "fixed-clock"; 120*724ba675SRob Herring clock-frequency = <24576000>; 121*724ba675SRob Herring }; 122*724ba675SRob Herring 123*724ba675SRob Herring clk_mcasp0: clk_mcasp0 { 124*724ba675SRob Herring #clock-cells = <0>; 125*724ba675SRob Herring compatible = "gpio-gate-clock"; 126*724ba675SRob Herring clocks = <&clk_mcasp0_fixed>; 127*724ba675SRob Herring enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ 128*724ba675SRob Herring }; 129*724ba675SRob Herring 130*724ba675SRob Herring sound { 131*724ba675SRob Herring compatible = "simple-audio-card"; 132*724ba675SRob Herring simple-audio-card,name = "TI BeagleBone Black"; 133*724ba675SRob Herring simple-audio-card,format = "i2s"; 134*724ba675SRob Herring simple-audio-card,bitclock-master = <&dailink0_master>; 135*724ba675SRob Herring simple-audio-card,frame-master = <&dailink0_master>; 136*724ba675SRob Herring 137*724ba675SRob Herring dailink0_master: simple-audio-card,cpu { 138*724ba675SRob Herring sound-dai = <&mcasp0>; 139*724ba675SRob Herring clocks = <&clk_mcasp0>; 140*724ba675SRob Herring }; 141*724ba675SRob Herring 142*724ba675SRob Herring simple-audio-card,codec { 143*724ba675SRob Herring sound-dai = <&tda19988>; 144*724ba675SRob Herring }; 145*724ba675SRob Herring }; 146*724ba675SRob Herring}; 147