xref: /linux/arch/arm/boot/dts/ti/keystone/keystone-k2g.dtsi (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for K2G SOC
4 *
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8#include <dt-bindings/interrupt-controller/arm-gic.h>
9#include <dt-bindings/pinctrl/keystone.h>
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	compatible = "ti,k2g","ti,keystone";
14	model = "Texas Instruments K2G SoC";
15	#address-cells = <2>;
16	#size-cells = <2>;
17	interrupt-parent = <&gic>;
18
19	chosen { };
20
21	aliases {
22		serial0 = &uart0;
23		serial1 = &uart1;
24		serial2 = &uart2;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		rproc0 = &dsp0;
29	};
30
31	cpus {
32		#address-cells = <1>;
33		#size-cells = <0>;
34
35		cpu@0 {
36			compatible = "arm,cortex-a15";
37			device_type = "cpu";
38			reg = <0>;
39		};
40	};
41
42	gic: interrupt-controller@2561000 {
43		compatible = "arm,gic-400", "arm,cortex-a15-gic";
44		#interrupt-cells = <3>;
45		interrupt-controller;
46		reg = <0x0 0x02561000 0x0 0x1000>,
47		      <0x0 0x02562000 0x0 0x2000>,
48		      <0x0 0x02564000 0x0 0x2000>,
49		      <0x0 0x02566000 0x0 0x2000>;
50		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
51				IRQ_TYPE_LEVEL_HIGH)>;
52	};
53
54	timer {
55		compatible = "arm,armv7-timer";
56		interrupts =
57			<GIC_PPI 13
58				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
59			<GIC_PPI 14
60				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
61			<GIC_PPI 11
62				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
63			<GIC_PPI 10
64				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
65	};
66
67	pmu {
68		compatible = "arm,cortex-a15-pmu";
69		interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
70	};
71
72	usbphy {
73		#address-cells = <1>;
74		#size-cells = <0>;
75		compatible = "simple-bus";
76
77		usb0_phy: usb-phy@0 {
78			compatible = "usb-nop-xceiv";
79			reg = <0>;
80			status = "disabled";
81		};
82
83		usb1_phy: usb-phy@1 {
84			compatible = "usb-nop-xceiv";
85			reg = <1>;
86			status = "disabled";
87		};
88	};
89
90	soc0: soc@0 {
91		#address-cells = <1>;
92		#size-cells = <1>;
93		#pinctrl-cells = <1>;
94		compatible = "ti,keystone","simple-bus";
95		ranges = <0x0 0x0 0x0 0xc0000000>;
96		dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
97
98		msm_ram: sram@c000000 {
99			compatible = "mmio-sram";
100			reg = <0x0c000000 0x100000>;
101			ranges = <0x0 0x0c000000 0x100000>;
102			#address-cells = <1>;
103			#size-cells = <1>;
104
105			bm-sram@f7000 {
106				reg = <0x000f7000 0x8000>;
107			};
108		};
109
110		k2g_pinctrl: pinmux@2621000 {
111			compatible = "pinctrl-single";
112			reg = <0x02621000 0x410>;
113			pinctrl-single,register-width = <32>;
114			pinctrl-single,function-mask = <0x001b0007>;
115		};
116
117		devctrl: device-state-control@2620000 {
118			compatible = "ti,keystone-devctrl", "syscon", "simple-mfd";
119			reg = <0x02620000 0x1000>;
120			#address-cells = <1>;
121			#size-cells = <1>;
122			ranges = <0x0 0x02620000 0x1000>;
123
124			kirq0: keystone_irq@2a0 {
125				compatible = "ti,keystone-irq";
126				reg = <0x2a0 0x10>;
127				interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
128				interrupt-controller;
129				#interrupt-cells = <1>;
130				ti,syscon-dev = <&devctrl 0x2a0>;
131			};
132
133			dspgpio0: keystone_dsp_gpio@240 {
134				compatible = "ti,keystone-dsp-gpio";
135				reg = <0x240 0x4>;
136				gpio-controller;
137				#gpio-cells = <2>;
138				gpio,syscon-dev = <&devctrl 0x240>;
139			};
140		};
141
142		uart0: serial@2530c00 {
143			compatible = "ti,da830-uart", "ns16550a";
144			current-speed = <115200>;
145			reg-shift = <2>;
146			reg-io-width = <4>;
147			reg = <0x02530c00 0x100>;
148			interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
149			clocks = <&k2g_clks 0x2c 0>;
150			power-domains = <&k2g_pds 0x2c>;
151			status = "disabled";
152		};
153
154		uart1: serial@2531000 {
155			compatible = "ti,da830-uart", "ns16550a";
156			current-speed = <115200>;
157			reg-shift = <2>;
158			reg-io-width = <4>;
159			reg = <0x02531000 0x100>;
160			interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>;
161			clocks = <&k2g_clks 0x2d 0>;
162			power-domains = <&k2g_pds 0x2d>;
163			status = "disabled";
164		};
165
166		uart2: serial@2531400 {
167			compatible = "ti,da830-uart", "ns16550a";
168			current-speed = <115200>;
169			reg-shift = <2>;
170			reg-io-width = <4>;
171			reg = <0x02531400 0x100>;
172			interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
173			clocks = <&k2g_clks 0x2e 0>;
174			power-domains = <&k2g_pds 0x2e>;
175			status = "disabled";
176		};
177
178		dcan0: can@260b200 {
179			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
180			reg = <0x0260b200 0x200>;
181			interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
182			status = "disabled";
183			power-domains = <&k2g_pds 0x0008>;
184			clocks = <&k2g_clks 0x0008 1>;
185		};
186
187		dcan1: can@260b400 {
188			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
189			reg = <0x0260b400 0x200>;
190			interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
191			status = "disabled";
192			power-domains = <&k2g_pds 0x0009>;
193			clocks = <&k2g_clks 0x0009 1>;
194		};
195
196		i2c0: i2c@2530000 {
197			compatible = "ti,keystone-i2c";
198			reg = <0x02530000 0x400>;
199			clocks = <&k2g_clks 0x003a 0>;
200			power-domains = <&k2g_pds 0x003a>;
201			interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
202			#address-cells = <1>;
203			#size-cells = <0>;
204			status = "disabled";
205		};
206
207		i2c1: i2c@2530400 {
208			compatible = "ti,keystone-i2c";
209			reg = <0x02530400 0x400>;
210			clocks = <&k2g_clks 0x003b 0>;
211			power-domains = <&k2g_pds 0x003b>;
212			interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
213			#address-cells = <1>;
214			#size-cells = <0>;
215			status = "disabled";
216		};
217
218		i2c2: i2c@2530800 {
219			compatible = "ti,keystone-i2c";
220			reg = <0x02530800 0x400>;
221			clocks = <&k2g_clks 0x003c 0>;
222			power-domains = <&k2g_pds 0x003c>;
223			interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
224			#address-cells = <1>;
225			#size-cells = <0>;
226			status = "disabled";
227		};
228
229		dsp0: dsp@10800000 {
230			compatible = "ti,k2g-dsp";
231			reg = <0x10800000 0x00100000>,
232			      <0x10e00000 0x00008000>,
233			      <0x10f00000 0x00008000>;
234			reg-names = "l2sram", "l1pram", "l1dram";
235			power-domains = <&k2g_pds 0x0046>;
236			ti,syscon-dev = <&devctrl 0x844>;
237			resets = <&k2g_reset 0x0046 0x1>;
238			interrupt-parent = <&kirq0>;
239			interrupts = <0 8>;
240			interrupt-names = "vring", "exception";
241			kick-gpios = <&dspgpio0 27 0>;
242			status = "disabled";
243		};
244
245		msgmgr: mailbox@2a00000 {
246			compatible = "ti,k2g-message-manager";
247			#mbox-cells = <2>;
248			reg-names = "queue_proxy_region",
249				    "queue_state_debug_region";
250			reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
251			interrupt-names = "rx_005",
252					  "rx_057";
253			interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
254				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
255		};
256
257		pmmc: system-controller@2921c00 {
258			compatible = "ti,k2g-sci";
259			mbox-names = "rx", "tx";
260			mboxes = <&msgmgr 5 2>,
261				<&msgmgr 0 0>;
262			reg-names = "debug_messages";
263			reg = <0x02921c00 0x400>;
264
265			k2g_pds: power-controller {
266				compatible = "ti,sci-pm-domain";
267				#power-domain-cells = <1>;
268			};
269
270			k2g_clks: clock-controller {
271				compatible = "ti,k2g-sci-clk";
272				#clock-cells = <2>;
273			};
274
275			k2g_reset: reset-controller {
276				compatible = "ti,sci-reset";
277				#reset-cells = <2>;
278			};
279		};
280
281		gpio0: gpio@2603000 {
282			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
283			reg = <0x02603000 0x100>;
284			gpio-controller;
285			#gpio-cells = <2>;
286
287			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
288					<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
289					<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
290					<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
291					<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
292					<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
293					<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
294					<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
295					<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
296			interrupt-controller;
297			#interrupt-cells = <2>;
298			ti,ngpio = <144>;
299			ti,davinci-gpio-unbanked = <0>;
300			clocks = <&k2g_clks 0x001b 0x0>;
301			clock-names = "gpio";
302		};
303
304		gpio1: gpio@260a000 {
305			compatible = "ti,k2g-gpio", "ti,keystone-gpio";
306			reg = <0x0260a000 0x100>;
307			gpio-controller;
308			#gpio-cells = <2>;
309			interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>,
310					<GIC_SPI 443 IRQ_TYPE_EDGE_RISING>,
311					<GIC_SPI 444 IRQ_TYPE_EDGE_RISING>,
312					<GIC_SPI 445 IRQ_TYPE_EDGE_RISING>,
313					<GIC_SPI 446 IRQ_TYPE_EDGE_RISING>;
314			interrupt-controller;
315			#interrupt-cells = <2>;
316			ti,ngpio = <68>;
317			ti,davinci-gpio-unbanked = <0>;
318			clocks = <&k2g_clks 0x001c 0x0>;
319			clock-names = "gpio";
320		};
321
322		dss: dss@02540000 {
323			compatible = "ti,k2g-dss";
324			reg = <0x02540000 0x400>,
325				<0x02550000 0x1000>,
326				<0x02557000 0x1000>,
327				<0x0255a800 0x100>,
328				<0x0255ac00 0x100>;
329			reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
330			clocks = <&k2g_clks 0x2 0>,
331					<&k2g_clks 0x2 1>;
332			clock-names = "fck", "vp1";
333			interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
334
335			power-domains = <&k2g_pds 0x2>;
336			status = "disabled";
337			#address-cells = <1>;
338			#size-cells = <1>;
339			ranges;
340
341			max-memory-bandwidth = <230000000>;
342		};
343
344		edma0: edma@2700000 {
345			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
346			reg = <0x02700000 0x8000>;
347			reg-names = "edma3_cc";
348			interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
349					<GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
350					<GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
351			interrupt-names = "edma3_ccint", "emda3_mperr",
352					  "edma3_ccerrint";
353			dma-requests = <64>;
354			#dma-cells = <2>;
355
356			ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
357
358			ti,edma-memcpy-channels = <32 33 34 35>;
359
360			power-domains = <&k2g_pds 0x3f>;
361		};
362
363		edma0_tptc0: tptc@2760000 {
364			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
365			reg = <0x02760000 0x400>;
366			power-domains = <&k2g_pds 0x3f>;
367		};
368
369		edma0_tptc1: tptc@2768000 {
370			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
371			reg = <0x02768000 0x400>;
372			power-domains = <&k2g_pds 0x3f>;
373		};
374
375		edma1: edma@2728000 {
376			compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
377			reg = <0x02728000 0x8000>;
378			reg-names = "edma3_cc";
379			interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
380					<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
381					<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
382			interrupt-names = "edma3_ccint", "emda3_mperr",
383					  "edma3_ccerrint";
384			dma-requests = <64>;
385			#dma-cells = <2>;
386
387			ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
388
389			/*
390			 * memcpy is disabled, can be enabled with:
391			 * ti,edma-memcpy-channels = <12 13 14 15>;
392			 * for example.
393			 */
394
395			power-domains = <&k2g_pds 0x4f>;
396		};
397
398		edma1_tptc0: tptc@27b0000 {
399			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
400			reg = <0x027b0000 0x400>;
401			power-domains = <&k2g_pds 0x4f>;
402		};
403
404		edma1_tptc1: tptc@27b8000 {
405			compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
406			reg = <0x027b8000 0x400>;
407			power-domains = <&k2g_pds 0x4f>;
408		};
409
410		mmc0: mmc@23000000 {
411			compatible = "ti,k2g-sdhci";
412			reg = <0x23000000 0x400>;
413			interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
414			bus-width = <4>;
415			no-1-8-v;
416			max-frequency = <96000000>;
417			power-domains = <&k2g_pds 0xb>;
418			clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
419			clock-names = "fck", "mmchsdb_fck";
420			status = "disabled";
421		};
422
423		mmc1: mmc@23100000 {
424			compatible = "ti,k2g-sdhci";
425			reg = <0x23100000 0x400>;
426			interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
427			bus-width = <8>;
428			no-1-8-v;
429			non-removable;
430			max-frequency = <96000000>;
431			power-domains = <&k2g_pds 0xc>;
432			clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>;
433			clock-names = "fck", "mmchsdb_fck";
434		};
435
436		qspi: spi@2940000 {
437			compatible = "ti,k2g-qspi", "cdns,qspi-nor";
438			#address-cells = <1>;
439			#size-cells = <0>;
440			reg = <0x02940000 0x1000>,
441			      <0x24000000 0x4000000>;
442			interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
443			cdns,fifo-depth = <256>;
444			cdns,fifo-width = <4>;
445			cdns,trigger-address = <0x24000000>;
446			clocks = <&k2g_clks 0x43 0x0>;
447			power-domains = <&k2g_pds 0x43>;
448			status = "disabled";
449		};
450
451		mcasp0: mcasp@2340000 {
452			compatible = "ti,am33xx-mcasp-audio";
453			reg = <0x02340000 0x2000>,
454			      <0x21804000 0x1000>;
455			reg-names = "mpu","dat";
456			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
457				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
458			interrupt-names = "tx", "rx";
459			dmas = <&edma0 24 1>, <&edma0 25 1>;
460			dma-names = "tx", "rx";
461			power-domains = <&k2g_pds 0x4>;
462			clocks = <&k2g_clks 0x4 0>;
463			clock-names = "fck";
464			status = "disabled";
465		};
466
467		mcasp1: mcasp@2342000 {
468			compatible = "ti,am33xx-mcasp-audio";
469			reg = <0x02342000 0x2000>,
470			      <0x21804400 0x1000>;
471			reg-names = "mpu","dat";
472			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
473				     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
474			interrupt-names = "tx", "rx";
475			dmas = <&edma1 48 1>, <&edma1 49 1>;
476			dma-names = "tx", "rx";
477			power-domains = <&k2g_pds 0x5>;
478			clocks = <&k2g_clks 0x5 0>;
479			clock-names = "fck";
480			status = "disabled";
481		};
482
483		mcasp2: mcasp@2344000 {
484			compatible = "ti,am33xx-mcasp-audio";
485			reg = <0x02344000 0x2000>,
486			      <0x21804800 0x1000>;
487			reg-names = "mpu","dat";
488			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
489				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
490			interrupt-names = "tx", "rx";
491			dmas = <&edma1 50 1>, <&edma1 51 1>;
492			dma-names = "tx", "rx";
493			power-domains = <&k2g_pds 0x6>;
494			clocks = <&k2g_clks 0x6 0>;
495			clock-names = "fck";
496			status = "disabled";
497		};
498
499		keystone_usb0: keystone-dwc3@2680000 {
500			compatible = "ti,keystone-dwc3";
501			#address-cells = <1>;
502			#size-cells = <1>;
503			reg = <0x2680000 0x10000>;
504			interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
505			ranges;
506			dma-coherent;
507			dma-ranges;
508			status = "disabled";
509			power-domains = <&k2g_pds 0x0016>;
510
511			usb0: usb@2690000 {
512				compatible = "snps,dwc3";
513				reg = <0x2690000 0x10000>;
514				interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>;
515				maximum-speed = "high-speed";
516				dr_mode = "otg";
517				usb-phy = <&usb0_phy>;
518				status = "disabled";
519			};
520		};
521
522		keystone_usb1: keystone-dwc3@2580000 {
523			compatible = "ti,keystone-dwc3";
524			#address-cells = <1>;
525			#size-cells = <1>;
526			reg = <0x2580000 0x10000>;
527			interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
528			ranges;
529			dma-coherent;
530			dma-ranges;
531			status = "disabled";
532			power-domains = <&k2g_pds 0x0017>;
533
534			usb1: usb@2590000 {
535				compatible = "snps,dwc3";
536				reg = <0x2590000 0x10000>;
537				interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>;
538				maximum-speed = "high-speed";
539				dr_mode = "otg";
540				usb-phy = <&usb1_phy>;
541				status = "disabled";
542			};
543		};
544
545		ecap0: pwm@21d1800 {
546			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
547			#pwm-cells = <3>;
548			reg = <0x021d1800 0x60>;
549			power-domains = <&k2g_pds 0x38>;
550			clocks = <&k2g_clks 0x38 0>;
551			clock-names = "fck";
552			status = "disabled";
553		};
554
555		ecap1: pwm@21d1c00 {
556			compatible = "ti,k2g-ecap", "ti,am3352-ecap";
557			#pwm-cells = <3>;
558			reg = <0x021d1c00 0x60>;
559			power-domains = <&k2g_pds 0x39>;
560			clocks = <&k2g_clks 0x39 0x0>;
561			clock-names = "fck";
562			status = "disabled";
563		};
564
565		spi0: spi@21805400 {
566			compatible = "ti,keystone-spi";
567			reg = <0x21805400 0x200>;
568			num-cs = <4>;
569			ti,davinci-spi-intr-line = <0>;
570			interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
571			#address-cells = <1>;
572			#size-cells = <0>;
573			power-domains = <&k2g_pds 0x0010>;
574			clocks = <&k2g_clks 0x0010 0>;
575		};
576
577		spi1: spi@21805800 {
578			compatible = "ti,keystone-spi";
579			reg = <0x21805800 0x200>;
580			num-cs = <4>;
581			ti,davinci-spi-intr-line = <0>;
582			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
583			#address-cells = <1>;
584			#size-cells = <0>;
585			power-domains = <&k2g_pds 0x0011>;
586			clocks = <&k2g_clks 0x0011 0>;
587		};
588
589		spi2: spi@21805c00 {
590			compatible = "ti,keystone-spi";
591			reg = <0x21805c00 0x200>;
592			num-cs = <4>;
593			ti,davinci-spi-intr-line = <0>;
594			interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
595			#address-cells = <1>;
596			#size-cells = <0>;
597			power-domains = <&k2g_pds 0x0012>;
598			clocks = <&k2g_clks 0x0012 0>;
599		};
600
601		spi3: spi@21806000 {
602			compatible = "ti,keystone-spi";
603			reg = <0x21806000 0x200>;
604			num-cs = <4>;
605			ti,davinci-spi-intr-line = <0>;
606			interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
607			#address-cells = <1>;
608			#size-cells = <0>;
609			power-domains = <&k2g_pds 0x0013>;
610			clocks = <&k2g_clks 0x0013 0>;
611		};
612
613		wdt: wdt@02250000 {
614			compatible = "ti,keystone-wdt", "ti,davinci-wdt";
615			reg = <0x02250000 0x80>;
616			power-domains = <&k2g_pds 0x22>;
617			clocks = <&k2g_clks 0x22 0>;
618		};
619
620		emif: emif@21010000 {
621			compatible = "ti,emif-keystone";
622			reg = <0x21010000 0x200>;
623			interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>;
624		};
625
626		mdio: mdio@4200f00 {
627			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
628			reg = <0x04200f00 0x100>;
629			#address-cells = <1>;
630			#size-cells = <0>;
631			clocks = <&k2g_clks 0x0018 3>;
632			clock-names = "fck";
633			power-domains = <&k2g_pds 0x0018>;
634			status = "disabled";
635			bus_freq = <2500000>;
636		};
637		#include "keystone-k2g-netcp.dtsi"
638	};
639};
640