xref: /linux/arch/arm/boot/dts/st/stm32mp15xx-dhcom-som.dtsi (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
4 */
5
6#include "stm32mp15-pinctrl.dtsi"
7#include "stm32mp15xxaa-pinctrl.dtsi"
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/mfd/st,stpmic1.h>
10
11/ {
12	aliases {
13		ethernet0 = &ethernet0;
14		ethernet1 = &ksz8851;
15		rtc0 = &hwrtc;
16		rtc1 = &rtc;
17	};
18
19	memory@c0000000 {
20		device_type = "memory";
21		reg = <0xC0000000 0x40000000>;
22	};
23
24	reserved-memory {
25		#address-cells = <1>;
26		#size-cells = <1>;
27		ranges;
28
29		mcuram2: mcuram2@10000000 {
30			compatible = "shared-dma-pool";
31			reg = <0x10000000 0x40000>;
32			no-map;
33		};
34
35		vdev0vring0: vdev0vring0@10040000 {
36			compatible = "shared-dma-pool";
37			reg = <0x10040000 0x1000>;
38			no-map;
39		};
40
41		vdev0vring1: vdev0vring1@10041000 {
42			compatible = "shared-dma-pool";
43			reg = <0x10041000 0x1000>;
44			no-map;
45		};
46
47		vdev0buffer: vdev0buffer@10042000 {
48			compatible = "shared-dma-pool";
49			reg = <0x10042000 0x4000>;
50			no-map;
51		};
52
53		mcuram: mcuram@30000000 {
54			compatible = "shared-dma-pool";
55			reg = <0x30000000 0x40000>;
56			no-map;
57		};
58
59		retram: retram@38000000 {
60			compatible = "shared-dma-pool";
61			reg = <0x38000000 0x10000>;
62			no-map;
63		};
64	};
65
66	ethernet_vio: vioregulator {
67		compatible = "regulator-fixed";
68		regulator-name = "vio";
69		regulator-min-microvolt = <3300000>;
70		regulator-max-microvolt = <3300000>;
71		gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
72		regulator-always-on;
73		regulator-boot-on;
74		vin-supply = <&vdd>;
75	};
76};
77
78&adc {
79	vdd-supply = <&vdd>;
80	vdda-supply = <&vdda>;
81	vref-supply = <&vdda>;
82	status = "okay";
83};
84
85&adc1 {
86	channel@0 {
87		reg = <0>;
88		st,min-sample-time-ns = <5000>;
89	};
90};
91
92&adc2 {
93	channel@1 {
94		reg = <1>;
95		st,min-sample-time-ns = <5000>;
96	};
97};
98
99&crc1 {
100	status = "okay";
101};
102
103&dac {
104	pinctrl-names = "default";
105	pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
106	vref-supply = <&vdda>;
107	status = "okay";
108
109	dac1: dac@1 {
110		status = "okay";
111	};
112	dac2: dac@2 {
113		status = "okay";
114	};
115};
116
117&dts {
118	status = "okay";
119};
120
121&ethernet0 {
122	status = "okay";
123	pinctrl-0 = <&ethernet0_rmii_pins_c &mco2_pins_a>;
124	pinctrl-1 = <&ethernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>;
125	pinctrl-names = "default", "sleep";
126	phy-mode = "rmii";
127	max-speed = <100>;
128	phy-handle = <&phy0>;
129
130	mdio {
131		#address-cells = <1>;
132		#size-cells = <0>;
133		compatible = "snps,dwmac-mdio";
134
135		phy0: ethernet-phy@1 {
136			reg = <1>;
137			/* LAN8710Ai */
138			compatible = "ethernet-phy-id0007.c0f0",
139				     "ethernet-phy-ieee802.3-c22";
140			clocks = <&rcc CK_MCO2>;
141			reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
142			reset-assert-us = <500>;
143			reset-deassert-us = <500>;
144			smsc,disable-energy-detect;
145			interrupt-parent = <&gpioi>;
146			interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
147		};
148	};
149};
150
151&fmc {
152	pinctrl-names = "default", "sleep";
153	pinctrl-0 = <&fmc_pins_b>;
154	pinctrl-1 = <&fmc_sleep_pins_b>;
155	status = "okay";
156
157	ksz8851: ethernet@1,0 {
158		compatible = "micrel,ks8851-mll";
159		reg = <1 0x0 0x2>, <1 0x2 0x20000>;
160		interrupt-parent = <&gpioc>;
161		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
162		bank-width = <2>;
163
164		/* Timing values are in nS */
165		st,fmc2-ebi-cs-mux-enable;
166		st,fmc2-ebi-cs-transaction-type = <4>;
167		st,fmc2-ebi-cs-buswidth = <16>;
168		st,fmc2-ebi-cs-address-setup-ns = <5>;
169		st,fmc2-ebi-cs-address-hold-ns = <5>;
170		st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
171		st,fmc2-ebi-cs-data-setup-ns = <45>;
172		st,fmc2-ebi-cs-data-hold-ns = <1>;
173		st,fmc2-ebi-cs-write-address-setup-ns = <5>;
174		st,fmc2-ebi-cs-write-address-hold-ns = <5>;
175		st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>;
176		st,fmc2-ebi-cs-write-data-setup-ns = <45>;
177		st,fmc2-ebi-cs-write-data-hold-ns = <1>;
178	};
179};
180
181&gpioa {
182	gpio-line-names = "", "", "", "",
183			  "", "", "DHCOM-K", "",
184			  "", "", "", "",
185			  "", "", "", "";
186};
187
188&gpiob {
189	gpio-line-names = "", "", "", "",
190			  "", "", "", "",
191			  "DHCOM-Q", "", "", "",
192			  "", "", "", "";
193};
194
195&gpioc {
196	gpio-line-names = "", "", "", "",
197			  "", "", "DHCOM-E", "",
198			  "", "", "", "",
199			  "", "", "", "";
200};
201
202&gpiod {
203	gpio-line-names = "", "", "", "",
204			  "", "", "DHCOM-B", "",
205			  "", "", "", "DHCOM-F",
206			  "DHCOM-D", "", "", "";
207};
208
209&gpioe {
210	gpio-line-names = "", "", "", "",
211			  "", "", "DHCOM-P", "",
212			  "", "", "", "",
213			  "", "", "", "";
214};
215
216&gpiof {
217	gpio-line-names = "", "", "", "DHCOM-A",
218			  "", "", "", "",
219			  "", "", "", "",
220			  "", "", "", "";
221};
222
223&gpiog {
224	gpio-line-names = "DHCOM-C", "", "", "",
225			  "", "", "", "",
226			  "DHCOM-L", "", "", "",
227			  "", "", "", "";
228};
229
230&gpioh {
231	gpio-line-names = "", "", "", "",
232			  "", "", "", "DHCOM-N",
233			  "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U",
234			  "DHCOM-T", "", "DHCOM-S", "";
235};
236
237&gpioi {
238	gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I",
239			  "DHCOM-R", "DHCOM-M", "", "",
240			  "", "", "", "",
241			  "", "", "", "";
242};
243
244&i2c4 {
245	pinctrl-names = "default";
246	pinctrl-0 = <&i2c4_pins_a>;
247	i2c-scl-rising-time-ns = <185>;
248	i2c-scl-falling-time-ns = <20>;
249	status = "okay";
250	/* spare dmas for other usage */
251	/delete-property/dmas;
252	/delete-property/dma-names;
253
254	hwrtc: rtc@32 {
255		compatible = "microcrystal,rv8803";
256		reg = <0x32>;
257	};
258
259	pmic: stpmic@33 {
260		compatible = "st,stpmic1";
261		reg = <0x33>;
262		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
263		interrupt-controller;
264		#interrupt-cells = <2>;
265		status = "okay";
266
267		regulators {
268			compatible = "st,stpmic1-regulators";
269			ldo1-supply = <&v3v3>;
270			ldo2-supply = <&v3v3>;
271			ldo3-supply = <&vdd_ddr>;
272			ldo5-supply = <&v3v3>;
273			ldo6-supply = <&v3v3>;
274			pwr_sw1-supply = <&bst_out>;
275			pwr_sw2-supply = <&bst_out>;
276
277			vddcore: buck1 {
278				regulator-name = "vddcore";
279				regulator-min-microvolt = <800000>;
280				regulator-max-microvolt = <1350000>;
281				regulator-always-on;
282				regulator-initial-mode = <0>;
283				regulator-over-current-protection;
284			};
285
286			vdd_ddr: buck2 {
287				regulator-name = "vdd_ddr";
288				regulator-min-microvolt = <1350000>;
289				regulator-max-microvolt = <1350000>;
290				regulator-always-on;
291				regulator-initial-mode = <0>;
292				regulator-over-current-protection;
293			};
294
295			vdd: buck3 {
296				regulator-name = "vdd";
297				regulator-min-microvolt = <3300000>;
298				regulator-max-microvolt = <3300000>;
299				regulator-always-on;
300				st,mask-reset;
301				regulator-initial-mode = <0>;
302				regulator-over-current-protection;
303			};
304
305			v3v3: buck4 {
306				regulator-name = "v3v3";
307				regulator-min-microvolt = <3300000>;
308				regulator-max-microvolt = <3300000>;
309				regulator-always-on;
310				regulator-over-current-protection;
311				regulator-initial-mode = <0>;
312			};
313
314			vdda: ldo1 {
315				regulator-name = "vdda";
316				regulator-always-on;
317				regulator-min-microvolt = <2900000>;
318				regulator-max-microvolt = <2900000>;
319				interrupts = <IT_CURLIM_LDO1 0>;
320			};
321
322			v2v8: ldo2 {
323				regulator-name = "v2v8";
324				regulator-min-microvolt = <2800000>;
325				regulator-max-microvolt = <2800000>;
326				interrupts = <IT_CURLIM_LDO2 0>;
327			};
328
329			vtt_ddr: ldo3 {
330				regulator-name = "vtt_ddr";
331				regulator-min-microvolt = <500000>;
332				regulator-max-microvolt = <750000>;
333				regulator-always-on;
334				regulator-over-current-protection;
335			};
336
337			vdd_usb: ldo4 {
338				regulator-name = "vdd_usb";
339				interrupts = <IT_CURLIM_LDO4 0>;
340			};
341
342			vdd_sd: ldo5 {
343				regulator-name = "vdd_sd";
344				regulator-min-microvolt = <2900000>;
345				regulator-max-microvolt = <2900000>;
346				interrupts = <IT_CURLIM_LDO5 0>;
347				regulator-boot-on;
348			};
349
350			v1v8: ldo6 {
351				regulator-name = "v1v8";
352				regulator-min-microvolt = <1800000>;
353				regulator-max-microvolt = <1800000>;
354				interrupts = <IT_CURLIM_LDO6 0>;
355			};
356
357			vref_ddr: vref_ddr {
358				regulator-name = "vref_ddr";
359				regulator-always-on;
360			};
361
362			bst_out: boost {
363				regulator-name = "bst_out";
364				interrupts = <IT_OCP_BOOST 0>;
365			};
366
367			vbus_otg: pwr_sw1 {
368				regulator-name = "vbus_otg";
369				interrupts = <IT_OCP_OTG 0>;
370			};
371
372			vbus_sw: pwr_sw2 {
373				regulator-name = "vbus_sw";
374				interrupts = <IT_OCP_SWOUT 0>;
375				regulator-active-discharge = <1>;
376			};
377		};
378
379		onkey {
380			compatible = "st,stpmic1-onkey";
381			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
382			interrupt-names = "onkey-falling", "onkey-rising";
383			power-off-time-sec = <10>;
384			status = "okay";
385		};
386
387		watchdog {
388			compatible = "st,stpmic1-wdt";
389			status = "disabled";
390		};
391	};
392
393	touchscreen@49 {
394		compatible = "ti,tsc2004";
395		reg = <0x49>;
396		vio-supply = <&v3v3>;
397		interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>;
398	};
399
400	eeprom@50 {
401		compatible = "atmel,24c02";
402		reg = <0x50>;
403		pagesize = <16>;
404	};
405};
406
407&ipcc {
408	status = "okay";
409};
410
411&iwdg2 {
412	timeout-sec = <32>;
413	status = "okay";
414};
415
416&m4_rproc {
417	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
418			<&vdev0vring1>, <&vdev0buffer>;
419	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
420	mbox-names = "vq0", "vq1", "shutdown", "detach";
421	interrupt-parent = <&exti>;
422	interrupts = <68 1>;
423	status = "okay";
424};
425
426&pwr_regulators {
427	vdd-supply = <&vdd>;
428	vdd_3v3_usbfs-supply = <&vdd_usb>;
429};
430
431&qspi {
432	pinctrl-names = "default", "sleep";
433	pinctrl-0 = <&qspi_clk_pins_a
434		     &qspi_bk1_pins_a
435		     &qspi_cs1_pins_a>;
436	pinctrl-1 = <&qspi_clk_sleep_pins_a
437		     &qspi_bk1_sleep_pins_a
438		     &qspi_cs1_sleep_pins_a>;
439	reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
440	#address-cells = <1>;
441	#size-cells = <0>;
442	status = "okay";
443
444	flash0: flash@0 {
445		compatible = "jedec,spi-nor";
446		reg = <0>;
447		spi-rx-bus-width = <4>;
448		spi-max-frequency = <108000000>;
449		#address-cells = <1>;
450		#size-cells = <1>;
451	};
452};
453
454&rcc {
455	/* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */
456	clocks = <&rcc CK_MCO2>;
457	clock-names = "ETH_RX_CLK/ETH_REF_CLK";
458
459	/*
460	 * Set PLL4P output to 100 MHz to supply SDMMC with faster clock,
461	 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2,
462	 * so that MCO2 behaves as a divider for the ETHRX clock here.
463	 */
464	assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>;
465	assigned-clock-parents = <&rcc PLL4_P>;
466	assigned-clock-rates = <50000000>, <100000000>;
467};
468
469&rng1 {
470	status = "okay";
471};
472
473&rtc {
474	status = "okay";
475};
476
477&sdmmc1 {
478	pinctrl-names = "default", "opendrain", "sleep", "init";
479	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
480	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
481	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
482	pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
483	cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
484	disable-wp;
485	st,sig-dir;
486	st,neg-edge;
487	st,use-ckin;
488	st,cmd-gpios = <&gpiod 2 0>;
489	st,ck-gpios = <&gpioc 12 0>;
490	st,ckin-gpios = <&gpioe 4 0>;
491	bus-width = <4>;
492	vmmc-supply = <&vdd_sd>;
493	status = "okay";
494};
495
496&sdmmc1_b4_pins_a {
497	/*
498	 * SD bus pull-up resistors:
499	 * - optional on SoMs with SD voltage translator
500	 * - mandatory on SoMs without SD voltage translator
501	 */
502	pins1 {
503		bias-pull-up;
504	};
505	pins2 {
506		bias-pull-up;
507	};
508};
509
510&sdmmc2 {
511	pinctrl-names = "default", "opendrain", "sleep";
512	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
513	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
514	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
515	non-removable;
516	no-sd;
517	no-sdio;
518	st,neg-edge;
519	bus-width = <8>;
520	vmmc-supply = <&v3v3>;
521	vqmmc-supply = <&v3v3>;
522	mmc-ddr-3_3v;
523	status = "okay";
524};
525
526&sdmmc3 {
527	pinctrl-names = "default", "opendrain", "sleep";
528	pinctrl-0 = <&sdmmc3_b4_pins_a>;
529	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
530	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
531	broken-cd;
532	st,neg-edge;
533	bus-width = <4>;
534	vmmc-supply = <&v3v3>;
535	vqmmc-supply = <&v3v3>;
536	mmc-ddr-3_3v;
537	status = "okay";
538};
539
540&uart4 {
541	pinctrl-names = "default";
542	pinctrl-0 = <&uart4_pins_a>;
543	/delete-property/dmas;
544	/delete-property/dma-names;
545	status = "okay";
546};
547