1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de> 4 */ 5 6#include "stm32mp15-pinctrl.dtsi" 7#include "stm32mp15xxaa-pinctrl.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/mfd/st,stpmic1.h> 10 11/ { 12 aliases { 13 ethernet0 = ðernet0; 14 ethernet1 = &ksz8851; 15 rtc0 = &hwrtc; 16 rtc1 = &rtc; 17 serial0 = &uart4; 18 serial1 = &uart8; 19 serial2 = &usart3; 20 }; 21 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 memory@c0000000 { 27 device_type = "memory"; 28 reg = <0xC0000000 0x40000000>; 29 }; 30 31 reserved-memory { 32 #address-cells = <1>; 33 #size-cells = <1>; 34 ranges; 35 36 mcuram2: mcuram2@10000000 { 37 compatible = "shared-dma-pool"; 38 reg = <0x10000000 0x40000>; 39 no-map; 40 }; 41 42 vdev0vring0: vdev0vring0@10040000 { 43 compatible = "shared-dma-pool"; 44 reg = <0x10040000 0x1000>; 45 no-map; 46 }; 47 48 vdev0vring1: vdev0vring1@10041000 { 49 compatible = "shared-dma-pool"; 50 reg = <0x10041000 0x1000>; 51 no-map; 52 }; 53 54 vdev0buffer: vdev0buffer@10042000 { 55 compatible = "shared-dma-pool"; 56 reg = <0x10042000 0x4000>; 57 no-map; 58 }; 59 60 mcuram: mcuram@30000000 { 61 compatible = "shared-dma-pool"; 62 reg = <0x30000000 0x40000>; 63 no-map; 64 }; 65 66 retram: retram@38000000 { 67 compatible = "shared-dma-pool"; 68 reg = <0x38000000 0x10000>; 69 no-map; 70 }; 71 }; 72 73 ethernet_vio: vioregulator { 74 compatible = "regulator-fixed"; 75 regulator-name = "vio"; 76 regulator-min-microvolt = <3300000>; 77 regulator-max-microvolt = <3300000>; 78 gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; 79 regulator-always-on; 80 regulator-boot-on; 81 vin-supply = <&vdd>; 82 }; 83}; 84 85&adc { 86 vdd-supply = <&vdd>; 87 vdda-supply = <&vdda>; 88 vref-supply = <&vdda>; 89 status = "okay"; 90}; 91 92&adc1 { 93 channel@0 { 94 reg = <0>; 95 st,min-sample-time-ns = <5000>; 96 }; 97}; 98 99&adc2 { 100 channel@1 { 101 reg = <1>; 102 st,min-sample-time-ns = <5000>; 103 }; 104}; 105 106&crc1 { 107 status = "okay"; 108}; 109 110&dac { 111 pinctrl-names = "default"; 112 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>; 113 vref-supply = <&vdda>; 114 status = "okay"; 115 116 dac1: dac@1 { 117 status = "okay"; 118 }; 119 dac2: dac@2 { 120 status = "okay"; 121 }; 122}; 123 124&dts { 125 status = "okay"; 126}; 127 128ðernet0 { 129 status = "okay"; 130 pinctrl-0 = <ðernet0_rmii_pins_c &mco2_pins_a>; 131 pinctrl-1 = <ðernet0_rmii_sleep_pins_c &mco2_sleep_pins_a>; 132 pinctrl-names = "default", "sleep"; 133 phy-mode = "rmii"; 134 max-speed = <100>; 135 phy-handle = <&phy0>; 136 137 mdio { 138 #address-cells = <1>; 139 #size-cells = <0>; 140 compatible = "snps,dwmac-mdio"; 141 142 phy0: ethernet-phy@1 { 143 reg = <1>; 144 /* LAN8710Ai */ 145 compatible = "ethernet-phy-id0007.c0f0", 146 "ethernet-phy-ieee802.3-c22"; 147 clocks = <&rcc CK_MCO2>; 148 reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; 149 reset-assert-us = <500>; 150 reset-deassert-us = <500>; 151 smsc,disable-energy-detect; 152 interrupt-parent = <&gpioi>; 153 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 154 }; 155 }; 156}; 157 158&fmc { 159 pinctrl-names = "default", "sleep"; 160 pinctrl-0 = <&fmc_pins_b>; 161 pinctrl-1 = <&fmc_sleep_pins_b>; 162 status = "okay"; 163 164 ksz8851: ethernet@1,0 { 165 compatible = "micrel,ks8851-mll"; 166 reg = <1 0x0 0x2>, <1 0x2 0x20000>; 167 interrupt-parent = <&gpioc>; 168 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 169 bank-width = <2>; 170 171 /* Timing values are in nS */ 172 st,fmc2-ebi-cs-mux-enable; 173 st,fmc2-ebi-cs-transaction-type = <4>; 174 st,fmc2-ebi-cs-buswidth = <16>; 175 st,fmc2-ebi-cs-address-setup-ns = <5>; 176 st,fmc2-ebi-cs-address-hold-ns = <5>; 177 st,fmc2-ebi-cs-bus-turnaround-ns = <5>; 178 st,fmc2-ebi-cs-data-setup-ns = <45>; 179 st,fmc2-ebi-cs-data-hold-ns = <1>; 180 st,fmc2-ebi-cs-write-address-setup-ns = <5>; 181 st,fmc2-ebi-cs-write-address-hold-ns = <5>; 182 st,fmc2-ebi-cs-write-bus-turnaround-ns = <5>; 183 st,fmc2-ebi-cs-write-data-setup-ns = <45>; 184 st,fmc2-ebi-cs-write-data-hold-ns = <1>; 185 }; 186}; 187 188&gpioa { 189 gpio-line-names = "", "", "", "", 190 "", "", "DHCOM-K", "", 191 "", "", "", "", 192 "", "", "", ""; 193}; 194 195&gpiob { 196 gpio-line-names = "", "", "", "", 197 "", "", "", "", 198 "DHCOM-Q", "", "", "", 199 "", "", "", ""; 200}; 201 202&gpioc { 203 gpio-line-names = "", "", "", "", 204 "", "", "DHCOM-E", "", 205 "", "", "", "", 206 "", "", "", ""; 207}; 208 209&gpiod { 210 gpio-line-names = "", "", "", "", 211 "", "", "DHCOM-B", "", 212 "", "", "", "DHCOM-F", 213 "DHCOM-D", "", "", ""; 214}; 215 216&gpioe { 217 gpio-line-names = "", "", "", "", 218 "", "", "DHCOM-P", "", 219 "", "", "", "", 220 "", "", "", ""; 221}; 222 223&gpiof { 224 gpio-line-names = "", "", "", "DHCOM-A", 225 "", "", "", "", 226 "", "", "", "", 227 "", "", "", ""; 228}; 229 230&gpiog { 231 gpio-line-names = "DHCOM-C", "", "", "", 232 "", "", "", "", 233 "DHCOM-L", "", "", "", 234 "", "", "", ""; 235}; 236 237&gpioh { 238 gpio-line-names = "", "", "", "", 239 "", "", "", "DHCOM-N", 240 "DHCOM-J", "DHCOM-W", "DHCOM-V", "DHCOM-U", 241 "DHCOM-T", "", "DHCOM-S", ""; 242}; 243 244&gpioi { 245 gpio-line-names = "DHCOM-G", "DHCOM-O", "DHCOM-H", "DHCOM-I", 246 "DHCOM-R", "DHCOM-M", "", "", 247 "", "", "", "", 248 "", "", "", ""; 249}; 250 251&i2c4 { 252 pinctrl-names = "default"; 253 pinctrl-0 = <&i2c4_pins_a>; 254 i2c-scl-rising-time-ns = <185>; 255 i2c-scl-falling-time-ns = <20>; 256 status = "okay"; 257 /* spare dmas for other usage */ 258 /delete-property/dmas; 259 /delete-property/dma-names; 260 261 hwrtc: rtc@32 { 262 compatible = "microcrystal,rv8803"; 263 reg = <0x32>; 264 }; 265 266 pmic: stpmic@33 { 267 compatible = "st,stpmic1"; 268 reg = <0x33>; 269 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 270 interrupt-controller; 271 #interrupt-cells = <2>; 272 273 regulators { 274 compatible = "st,stpmic1-regulators"; 275 ldo1-supply = <&v3v3>; 276 ldo2-supply = <&v3v3>; 277 ldo3-supply = <&vdd_ddr>; 278 ldo5-supply = <&v3v3>; 279 ldo6-supply = <&v3v3>; 280 pwr_sw1-supply = <&bst_out>; 281 pwr_sw2-supply = <&bst_out>; 282 283 vddcore: buck1 { 284 regulator-name = "vddcore"; 285 regulator-min-microvolt = <800000>; 286 regulator-max-microvolt = <1350000>; 287 regulator-always-on; 288 regulator-initial-mode = <0>; 289 regulator-over-current-protection; 290 }; 291 292 vdd_ddr: buck2 { 293 regulator-name = "vdd_ddr"; 294 regulator-min-microvolt = <1350000>; 295 regulator-max-microvolt = <1350000>; 296 regulator-always-on; 297 regulator-initial-mode = <0>; 298 regulator-over-current-protection; 299 }; 300 301 vdd: buck3 { 302 regulator-name = "vdd"; 303 regulator-min-microvolt = <3300000>; 304 regulator-max-microvolt = <3300000>; 305 regulator-always-on; 306 st,mask-reset; 307 regulator-initial-mode = <0>; 308 regulator-over-current-protection; 309 }; 310 311 v3v3: buck4 { 312 regulator-name = "v3v3"; 313 regulator-min-microvolt = <3300000>; 314 regulator-max-microvolt = <3300000>; 315 regulator-always-on; 316 regulator-over-current-protection; 317 regulator-initial-mode = <0>; 318 }; 319 320 vdda: ldo1 { 321 regulator-name = "vdda"; 322 regulator-always-on; 323 regulator-min-microvolt = <2900000>; 324 regulator-max-microvolt = <2900000>; 325 interrupts = <IT_CURLIM_LDO1 0>; 326 }; 327 328 v2v8: ldo2 { 329 regulator-name = "v2v8"; 330 regulator-min-microvolt = <2800000>; 331 regulator-max-microvolt = <2800000>; 332 interrupts = <IT_CURLIM_LDO2 0>; 333 }; 334 335 vtt_ddr: ldo3 { 336 regulator-name = "vtt_ddr"; 337 regulator-min-microvolt = <500000>; 338 regulator-max-microvolt = <750000>; 339 regulator-always-on; 340 regulator-over-current-protection; 341 }; 342 343 vdd_usb: ldo4 { 344 regulator-name = "vdd_usb"; 345 interrupts = <IT_CURLIM_LDO4 0>; 346 }; 347 348 vdd_sd: ldo5 { 349 regulator-name = "vdd_sd"; 350 regulator-min-microvolt = <2900000>; 351 regulator-max-microvolt = <2900000>; 352 interrupts = <IT_CURLIM_LDO5 0>; 353 regulator-boot-on; 354 }; 355 356 v1v8: ldo6 { 357 regulator-name = "v1v8"; 358 regulator-min-microvolt = <1800000>; 359 regulator-max-microvolt = <1800000>; 360 interrupts = <IT_CURLIM_LDO6 0>; 361 }; 362 363 vref_ddr: vref_ddr { 364 regulator-name = "vref_ddr"; 365 regulator-always-on; 366 }; 367 368 bst_out: boost { 369 regulator-name = "bst_out"; 370 interrupts = <IT_OCP_BOOST 0>; 371 }; 372 373 vbus_otg: pwr_sw1 { 374 regulator-name = "vbus_otg"; 375 interrupts = <IT_OCP_OTG 0>; 376 }; 377 378 vbus_sw: pwr_sw2 { 379 regulator-name = "vbus_sw"; 380 interrupts = <IT_OCP_SWOUT 0>; 381 regulator-active-discharge = <1>; 382 }; 383 }; 384 385 onkey { 386 compatible = "st,stpmic1-onkey"; 387 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>; 388 interrupt-names = "onkey-falling", "onkey-rising"; 389 power-off-time-sec = <10>; 390 }; 391 392 watchdog { 393 compatible = "st,stpmic1-wdt"; 394 status = "disabled"; 395 }; 396 }; 397 398 touchscreen@49 { 399 compatible = "ti,tsc2004"; 400 reg = <0x49>; 401 vio-supply = <&v3v3>; 402 interrupts-extended = <&gpioh 15 IRQ_TYPE_EDGE_FALLING>; 403 }; 404 405 eeprom@50 { 406 compatible = "atmel,24c02"; 407 reg = <0x50>; 408 pagesize = <16>; 409 }; 410}; 411 412&ipcc { 413 status = "okay"; 414}; 415 416&iwdg2 { 417 timeout-sec = <32>; 418 status = "okay"; 419}; 420 421&m4_rproc { 422 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 423 <&vdev0vring1>, <&vdev0buffer>; 424 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; 425 mbox-names = "vq0", "vq1", "shutdown", "detach"; 426 interrupt-parent = <&exti>; 427 interrupts = <68 1>; 428 status = "okay"; 429}; 430 431&pwr_regulators { 432 vdd-supply = <&vdd>; 433 vdd_3v3_usbfs-supply = <&vdd_usb>; 434}; 435 436&qspi { 437 pinctrl-names = "default", "sleep"; 438 pinctrl-0 = <&qspi_clk_pins_a 439 &qspi_bk1_pins_a 440 &qspi_cs1_pins_a>; 441 pinctrl-1 = <&qspi_clk_sleep_pins_a 442 &qspi_bk1_sleep_pins_a 443 &qspi_cs1_sleep_pins_a>; 444 reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; 445 #address-cells = <1>; 446 #size-cells = <0>; 447 status = "okay"; 448 449 flash0: flash@0 { 450 compatible = "jedec,spi-nor"; 451 reg = <0>; 452 spi-rx-bus-width = <4>; 453 spi-max-frequency = <108000000>; 454 #address-cells = <1>; 455 #size-cells = <1>; 456 }; 457}; 458 459&rcc { 460 /* Connect MCO2 output to ETH_RX_CLK input via pad-pad connection */ 461 clocks = <&rcc CK_MCO2>; 462 clock-names = "ETH_RX_CLK/ETH_REF_CLK"; 463 464 /* 465 * Set PLL4P output to 100 MHz to supply SDMMC with faster clock, 466 * set MCO2 output to 50 MHz to supply ETHRX clock with PLL4P/2, 467 * so that MCO2 behaves as a divider for the ETHRX clock here. 468 */ 469 assigned-clocks = <&rcc CK_MCO2>, <&rcc PLL4_P>; 470 assigned-clock-parents = <&rcc PLL4_P>; 471 assigned-clock-rates = <50000000>, <100000000>; 472}; 473 474&rng1 { 475 status = "okay"; 476}; 477 478&rtc { 479 status = "okay"; 480}; 481 482&sdmmc1 { 483 pinctrl-names = "default", "opendrain", "sleep", "init"; 484 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; 485 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; 486 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; 487 pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>; 488 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 489 disable-wp; 490 st,sig-dir; 491 st,neg-edge; 492 st,use-ckin; 493 st,cmd-gpios = <&gpiod 2 0>; 494 st,ck-gpios = <&gpioc 12 0>; 495 st,ckin-gpios = <&gpioe 4 0>; 496 bus-width = <4>; 497 vmmc-supply = <&vdd_sd>; 498 status = "okay"; 499}; 500 501&sdmmc1_b4_pins_a { 502 /* 503 * SD bus pull-up resistors: 504 * - optional on SoMs with SD voltage translator 505 * - mandatory on SoMs without SD voltage translator 506 */ 507 pins1 { 508 bias-pull-up; 509 }; 510 pins2 { 511 bias-pull-up; 512 }; 513}; 514 515&sdmmc2 { 516 pinctrl-names = "default", "opendrain", "sleep"; 517 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>; 518 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>; 519 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; 520 non-removable; 521 no-sd; 522 no-sdio; 523 st,neg-edge; 524 bus-width = <8>; 525 vmmc-supply = <&v3v3>; 526 vqmmc-supply = <&v3v3>; 527 mmc-ddr-3_3v; 528 status = "okay"; 529}; 530 531&sdmmc3 { 532 pinctrl-names = "default", "opendrain", "sleep"; 533 pinctrl-0 = <&sdmmc3_b4_pins_a>; 534 pinctrl-1 = <&sdmmc3_b4_od_pins_a>; 535 pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>; 536 broken-cd; 537 st,neg-edge; 538 bus-width = <4>; 539 vmmc-supply = <&v3v3>; 540 vqmmc-supply = <&v3v3>; 541 mmc-ddr-3_3v; 542 status = "okay"; 543}; 544 545&uart4 { 546 pinctrl-names = "default"; 547 pinctrl-0 = <&uart4_pins_a>; 548 /delete-property/dmas; 549 /delete-property/dma-names; 550 status = "okay"; 551}; 552