xref: /linux/arch/arm/boot/dts/st/stm32mp135f-dk.dts (revision fcc79e1714e8c2b8e216dc3149812edd37884eef) 
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/leds/common.h>
12#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
13#include "stm32mp135.dtsi"
14#include "stm32mp13xf.dtsi"
15#include "stm32mp13-pinctrl.dtsi"
16
17/ {
18	model = "STMicroelectronics STM32MP135F-DK Discovery Board";
19	compatible = "st,stm32mp135f-dk", "st,stm32mp135";
20
21	aliases {
22		ethernet0 = &ethernet1;
23		serial0 = &uart4;
24		serial1 = &usart1;
25		serial2 = &uart8;
26		serial3 = &usart2;
27	};
28
29	chosen {
30		stdout-path = "serial0:115200n8";
31	};
32
33	clocks {
34		clk_ext_camera: clk-ext-camera {
35			#clock-cells = <0>;
36			compatible = "fixed-clock";
37			clock-frequency = <24000000>;
38		};
39
40		clk_mco1: clk-mco1 {
41			#clock-cells = <0>;
42			compatible = "fixed-clock";
43			clock-frequency = <24000000>;
44		};
45	};
46
47	memory@c0000000 {
48		device_type = "memory";
49		reg = <0xc0000000 0x20000000>;
50	};
51
52	reserved-memory {
53		#address-cells = <1>;
54		#size-cells = <1>;
55		ranges;
56
57		optee@dd000000 {
58			reg = <0xdd000000 0x3000000>;
59			no-map;
60		};
61	};
62
63	gpio-keys {
64		compatible = "gpio-keys";
65
66		button-user {
67			label = "User-PA13";
68			linux,code = <BTN_1>;
69			gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
70		};
71	};
72
73	leds {
74		compatible = "gpio-leds";
75
76		led-blue {
77			function = LED_FUNCTION_HEARTBEAT;
78			color = <LED_COLOR_ID_BLUE>;
79			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
80			linux,default-trigger = "heartbeat";
81			default-state = "off";
82		};
83	};
84
85	panel_backlight: panel-backlight {
86		compatible = "gpio-backlight";
87		gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>;
88		default-on;
89		status = "okay";
90	};
91
92	panel_rgb: panel-rgb {
93		compatible = "rocktech,rk043fn48h";
94		enable-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>;
95		backlight = <&panel_backlight>;
96		power-supply = <&scmi_v3v3_sw>;
97		status = "okay";
98
99		width-mm = <105>;
100		height-mm = <67>;
101
102		panel-timing {
103			clock-frequency = <10000000>;
104			hactive = <480>;
105			hback-porch = <43>;
106			hfront-porch = <10>;
107			hsync-len = <1>;
108			hsync-active = <0>;
109			vactive = <272>;
110			vback-porch = <26>;
111			vfront-porch = <4>;
112			vsync-len = <10>;
113			vsync-active = <0>;
114			de-active = <1>;
115			pixelclk-active = <1>;
116		};
117
118		port {
119			panel_in_rgb: endpoint {
120				remote-endpoint = <&ltdc_out_rgb>;
121			};
122		};
123	};
124
125	v3v3_ao: v3v3-ao {
126		compatible = "regulator-fixed";
127		regulator-name = "v3v3_ao";
128		regulator-min-microvolt = <3300000>;
129		regulator-max-microvolt = <3300000>;
130		regulator-always-on;
131	};
132
133	wifi_pwrseq: wifi-pwrseq {
134		compatible = "mmc-pwrseq-simple";
135		reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>;
136	};
137};
138
139&adc_1 {
140	pinctrl-names = "default";
141	pinctrl-0 = <&adc1_usb_cc_pins_a>;
142	vdda-supply = <&scmi_vdd_adc>;
143	vref-supply = <&scmi_vdd_adc>;
144	status = "okay";
145	adc1: adc@0 {
146		status = "okay";
147		/*
148		 * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
149		 * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
150		 * 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
151		 * Use arbitrary margin here (e.g. 5us).
152		 */
153		channel@6 {
154			reg = <6>;
155			st,min-sample-time-ns = <5000>;
156		};
157		channel@12 {
158			reg = <12>;
159			st,min-sample-time-ns = <5000>;
160		};
161	};
162};
163
164&crc1 {
165	status = "okay";
166};
167
168&cryp {
169	status = "okay";
170};
171
172&dcmipp {
173	pinctrl-names = "default", "sleep";
174	pinctrl-0 = <&dcmipp_pins_a>;
175	pinctrl-1 = <&dcmipp_sleep_pins_a>;
176	status = "okay";
177
178	port {
179		dcmipp_0: endpoint {
180			remote-endpoint = <&mipid02_2>;
181			bus-width = <8>;
182			hsync-active = <0>;
183			vsync-active = <0>;
184			pclk-sample = <0>;
185		};
186	};
187};
188
189&ethernet1 {
190	status = "okay";
191	pinctrl-0 = <&eth1_rmii_pins_a>;
192	pinctrl-1 = <&eth1_rmii_sleep_pins_a>;
193	pinctrl-names = "default", "sleep";
194	phy-mode = "rmii";
195	phy-handle = <&phy0_eth1>;
196
197	mdio {
198		#address-cells = <1>;
199		#size-cells = <0>;
200		compatible = "snps,dwmac-mdio";
201
202		phy0_eth1: ethernet-phy@0 {
203			compatible = "ethernet-phy-id0007.c131";
204			reg = <0>;
205			reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
206			wakeup-source;
207		};
208	};
209};
210
211&i2c1 {
212	pinctrl-names = "default", "sleep";
213	pinctrl-0 = <&i2c1_pins_a>;
214	pinctrl-1 = <&i2c1_sleep_pins_a>;
215	i2c-scl-rising-time-ns = <96>;
216	i2c-scl-falling-time-ns = <3>;
217	clock-frequency = <1000000>;
218	status = "okay";
219	/* spare dmas for other usage */
220	/delete-property/dmas;
221	/delete-property/dma-names;
222
223	mcp23017: pinctrl@21 {
224		compatible = "microchip,mcp23017";
225		reg = <0x21>;
226		gpio-controller;
227		#gpio-cells = <2>;
228		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
229		interrupt-parent = <&gpiog>;
230		pinctrl-names = "default";
231		pinctrl-0 = <&mcp23017_pins_a>;
232		interrupt-controller;
233		#interrupt-cells = <2>;
234		microchip,irq-mirror;
235	};
236
237	typec@53 {
238		compatible = "st,stm32g0-typec";
239		reg = <0x53>;
240		/* Alert pin on PI2 */
241		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
242		interrupt-parent = <&gpioi>;
243		/* Internal pull-up on PI2 */
244		pinctrl-names = "default";
245		pinctrl-0 = <&stm32g0_intn_pins_a>;
246		firmware-name = "stm32g0-ucsi.mp135f-dk.fw";
247		connector {
248			compatible = "usb-c-connector";
249			label = "USB-C";
250
251			port {
252				con_usb_c_g0_ep: endpoint {
253					remote-endpoint = <&usbotg_hs_ep>;
254				};
255			};
256		};
257	};
258};
259
260&i2c5 {
261	pinctrl-names = "default", "sleep";
262	pinctrl-0 = <&i2c5_pins_a>;
263	pinctrl-1 = <&i2c5_sleep_pins_a>;
264	i2c-scl-rising-time-ns = <170>;
265	i2c-scl-falling-time-ns = <5>;
266	clock-frequency = <400000>;
267	status = "okay";
268	/* spare dmas for other usage */
269	/delete-property/dmas;
270	/delete-property/dma-names;
271
272	stmipi: csi2rx@14 {
273		compatible = "st,st-mipid02";
274		reg = <0x14>;
275		clocks = <&clk_mco1>;
276		clock-names = "xclk";
277		VDDE-supply = <&scmi_v1v8_periph>;
278		VDDIN-supply = <&scmi_v1v8_periph>;
279		reset-gpios = <&mcp23017 2 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
280		status = "okay";
281
282		ports {
283			#address-cells = <1>;
284			#size-cells = <0>;
285			port@0 {
286				reg = <0>;
287
288				mipid02_0: endpoint {
289					data-lanes = <1 2>;
290					lane-polarities = <0 0 0>;
291					remote-endpoint = <&gc2145_ep>;
292				};
293			};
294			port@2 {
295				reg = <2>;
296
297				mipid02_2: endpoint {
298					bus-width = <8>;
299					hsync-active = <0>;
300					vsync-active = <0>;
301					pclk-sample = <0>;
302					remote-endpoint = <&dcmipp_0>;
303				};
304			};
305		};
306	};
307
308	gc2145: camera@3c {
309		compatible = "galaxycore,gc2145";
310		reg = <0x3c>;
311		clocks = <&clk_ext_camera>;
312		iovdd-supply = <&scmi_v3v3_sw>;
313		avdd-supply = <&scmi_v3v3_sw>;
314		dvdd-supply = <&scmi_v3v3_sw>;
315		powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
316		reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
317		status = "okay";
318
319		port {
320			gc2145_ep: endpoint {
321				remote-endpoint = <&mipid02_0>;
322				data-lanes = <1 2>;
323				link-frequencies = /bits/ 64 <120000000 192000000 240000000>;
324			};
325		};
326	};
327
328	goodix: goodix-ts@5d {
329		compatible = "goodix,gt911";
330		reg = <0x5d>;
331		pinctrl-names = "default";
332		pinctrl-0 = <&goodix_pins_a>;
333		interrupt-parent = <&gpiof>;
334		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
335		AVDD28-supply = <&scmi_v3v3_sw>;
336		VDDIO-supply = <&scmi_v3v3_sw>;
337		touchscreen-size-x = <480>;
338		touchscreen-size-y = <272>;
339		status = "okay" ;
340	};
341};
342
343&iwdg2 {
344	timeout-sec = <32>;
345	status = "okay";
346};
347
348&ltdc {
349	pinctrl-names = "default", "sleep";
350	pinctrl-0 = <&ltdc_pins_a>;
351	pinctrl-1 = <&ltdc_sleep_pins_a>;
352	status = "okay";
353
354	port {
355		ltdc_out_rgb: endpoint {
356			remote-endpoint = <&panel_in_rgb>;
357		};
358	};
359};
360
361&rtc {
362	pinctrl-names = "default";
363	pinctrl-0 = <&rtc_rsvd_pins_a>;
364	status = "okay";
365
366	rtc_lsco_pins_a: rtc-lsco-0 {
367		pins = "out2_rmp";
368		function = "lsco";
369	};
370};
371
372&scmi_regu {
373	scmi_vdd_adc: regulator@10 {
374		reg = <VOLTD_SCMI_STPMIC1_LDO1>;
375		regulator-name = "vdd_adc";
376	};
377	scmi_vdd_usb: regulator@13 {
378		reg = <VOLTD_SCMI_STPMIC1_LDO4>;
379		regulator-name = "vdd_usb";
380	};
381	scmi_vdd_sd: regulator@14 {
382		reg = <VOLTD_SCMI_STPMIC1_LDO5>;
383		regulator-name = "vdd_sd";
384	};
385	scmi_v1v8_periph: regulator@15 {
386		reg = <VOLTD_SCMI_STPMIC1_LDO6>;
387		regulator-name = "v1v8_periph";
388	};
389	scmi_v3v3_sw: regulator@19 {
390		reg = <VOLTD_SCMI_STPMIC1_PWR_SW2>;
391		regulator-name = "v3v3_sw";
392	};
393};
394
395&sdmmc1 {
396	pinctrl-names = "default", "opendrain", "sleep";
397	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
398	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
399	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
400	cd-gpios = <&gpioh 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
401	disable-wp;
402	st,neg-edge;
403	bus-width = <4>;
404	vmmc-supply = <&scmi_vdd_sd>;
405	status = "okay";
406};
407
408/* Wifi */
409&sdmmc2 {
410	pinctrl-names = "default", "opendrain", "sleep";
411	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>;
412	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>;
413	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
414	non-removable;
415	cap-sdio-irq;
416	st,neg-edge;
417	bus-width = <4>;
418	vmmc-supply = <&v3v3_ao>;
419	mmc-pwrseq = <&wifi_pwrseq>;
420	#address-cells = <1>;
421	#size-cells = <0>;
422	status = "okay";
423
424	brcmf: bcrmf@1 {
425		reg = <1>;
426		compatible = "brcm,bcm4329-fmac";
427		pinctrl-names = "default";
428		pinctrl-0 = <&rtc_lsco_pins_a>;
429	};
430};
431
432&spi5 {
433	pinctrl-names = "default", "sleep";
434	pinctrl-0 = <&spi5_pins_a>;
435	pinctrl-1 = <&spi5_sleep_pins_a>;
436	status = "disabled";
437};
438
439&timers3 {
440	/delete-property/dmas;
441	/delete-property/dma-names;
442	status = "disabled";
443	pwm {
444		/* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */
445		pinctrl-0 = <&pwm3_pins_a>;
446		pinctrl-1 = <&pwm3_sleep_pins_a>;
447		pinctrl-names = "default", "sleep";
448		status = "okay";
449	};
450	timer@2 {
451		status = "okay";
452	};
453};
454
455&timers4 {
456	/delete-property/dmas;
457	/delete-property/dma-names;
458	status = "disabled";
459	pwm {
460		/* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */
461		pinctrl-0 = <&pwm4_pins_a>;
462		pinctrl-1 = <&pwm4_sleep_pins_a>;
463		pinctrl-names = "default", "sleep";
464		status = "okay";
465	};
466	timer@3 {
467		status = "okay";
468	};
469};
470
471&timers8 {
472	/delete-property/dmas;
473	/delete-property/dma-names;
474	status = "disabled";
475	pwm {
476		/* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */
477		pinctrl-0 = <&pwm8_pins_a>;
478		pinctrl-1 = <&pwm8_sleep_pins_a>;
479		pinctrl-names = "default", "sleep";
480		status = "okay";
481	};
482	timer@7 {
483		status = "okay";
484	};
485};
486
487&timers14 {
488	status = "disabled";
489	pwm {
490		/* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */
491		pinctrl-0 = <&pwm14_pins_a>;
492		pinctrl-1 = <&pwm14_sleep_pins_a>;
493		pinctrl-names = "default", "sleep";
494		status = "okay";
495	};
496	timer@13 {
497		status = "okay";
498	};
499};
500
501&uart4 {
502	pinctrl-names = "default", "sleep", "idle";
503	pinctrl-0 = <&uart4_pins_a>;
504	pinctrl-1 = <&uart4_sleep_pins_a>;
505	pinctrl-2 = <&uart4_idle_pins_a>;
506	/delete-property/dmas;
507	/delete-property/dma-names;
508	status = "okay";
509};
510
511&uart8 {
512	pinctrl-names = "default", "sleep", "idle";
513	pinctrl-0 = <&uart8_pins_a>;
514	pinctrl-1 = <&uart8_sleep_pins_a>;
515	pinctrl-2 = <&uart8_idle_pins_a>;
516	/delete-property/dmas;
517	/delete-property/dma-names;
518	status = "disabled";
519};
520
521&usart1 {
522	pinctrl-names = "default", "sleep", "idle";
523	pinctrl-0 = <&usart1_pins_a>;
524	pinctrl-1 = <&usart1_sleep_pins_a>;
525	pinctrl-2 = <&usart1_idle_pins_a>;
526	uart-has-rtscts;
527	status = "disabled";
528};
529
530/* Bluetooth */
531&usart2 {
532	pinctrl-names = "default", "sleep", "idle";
533	pinctrl-0 = <&usart2_pins_a>;
534	pinctrl-1 = <&usart2_sleep_pins_a>;
535	pinctrl-2 = <&usart2_idle_pins_a>;
536	uart-has-rtscts;
537	status = "okay";
538
539	bluetooth {
540		shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>;
541		compatible = "brcm,bcm43438-bt";
542		max-speed = <3000000>;
543		vbat-supply = <&v3v3_ao>;
544		vddio-supply = <&v3v3_ao>;
545	};
546};
547
548&usbh_ehci {
549	phys = <&usbphyc_port0>;
550	status = "okay";
551	#address-cells = <1>;
552	#size-cells = <0>;
553	/* onboard HUB */
554	hub@1 {
555		compatible = "usb424,2514";
556		reg = <1>;
557		vdd-supply = <&scmi_v3v3_sw>;
558	};
559};
560
561&usbotg_hs {
562	phys = <&usbphyc_port1 0>;
563	phy-names = "usb2-phy";
564	usb-role-switch;
565	status = "okay";
566	port {
567		usbotg_hs_ep: endpoint {
568			remote-endpoint = <&con_usb_c_g0_ep>;
569		};
570	};
571};
572
573&usbphyc {
574	status = "okay";
575};
576
577&usbphyc_port0 {
578	phy-supply = <&scmi_vdd_usb>;
579	st,current-boost-microamp = <1000>;
580	st,decrease-hs-slew-rate;
581	st,tune-hs-dc-level = <2>;
582	st,enable-hs-rftime-reduction;
583	st,trim-hs-current = <11>;
584	st,trim-hs-impedance = <2>;
585	st,tune-squelch-level = <1>;
586	st,enable-hs-rx-gain-eq;
587	st,no-hs-ftime-ctrl;
588	st,no-lsfs-sc;
589};
590
591&usbphyc_port1 {
592	phy-supply = <&scmi_vdd_usb>;
593	st,current-boost-microamp = <1000>;
594	st,decrease-hs-slew-rate;
595	st,tune-hs-dc-level = <2>;
596	st,enable-hs-rftime-reduction;
597	st,trim-hs-current = <11>;
598	st,trim-hs-impedance = <2>;
599	st,tune-squelch-level = <1>;
600	st,enable-hs-rx-gain-eq;
601	st,no-hs-ftime-ctrl;
602	st,no-lsfs-sc;
603};
604